HP NuDAQ I-9111DG/HR manual Interrupt Source Control, Extended Digital I/O Port

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users must check if another IRQ is also asserted, then clear current IRQ to allow the next IRQ occurring.

The two IRQs are named as INT1 and INT2. INT1 comes from AD EOC or the FIFO half-full flag. INT2 comes from timer‘s pacer output or the external interrupt request. The sources of INT1 and INT2 are selective by the Interrupt Control (ISC) Register.

Because of dual interrupt system, for example, you can use FIFO half-full and external interrupt at the same time if your software ISR can distinguish these two events.

4.2.4Interrupt Source Control

There are two bits to control the IRQ sources of INT1 and INT2. Refer to section 3.10 for the details of the bits. In addition, the PCI controller itself can also control the using of the interrupt. For manipulating the interrupt system more easily, ADLINK recommend you to use the function _9111_INT_Source_Control to control the IRQ source so that you can disable one or two of the IRQ sources.

Note that even you disable all the two IRQ sources without change the initial condition of the PCI controller, the PCI BIOS still assigns an IRQ level to the PCI card and it will occupy the PC resource. It is not suggested to re-design the initial condition of the PCI card by users‘ own application software. If users want to disable the IRQ level, please use the ADLINK’s software utility to change the power on interrupt setting.

4.3Extended Digital I/O Port

There are 4 extended digital input (EDI) signals and 4 extended digital output (EDO) signals on CN3 connector. The 4 EDI signals are dedicated used as input signal, however the 4 EDO signals can be used as digital input (Mode 1), digital output (Mode 2) or channel number output (Mode 3).

For power on safety, the EDO channel is set to be input when power on initial. To modify the configuration of the usage of the signals, please use the “_9111_Set_EDO_Function” in the library.

Note that w hen set the EDO function as channel number output (Mode 3), it presents the high nibble (4 MSBs) of the channel number no matter manual scan or auto scan mode.

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Contents NuDAQ Trademarks Getting service from Adlink QuestionsPage Features Applications Specifications Software Supporting B l e o f C o n t e n t sPCI PnP Registers Address Map Conversion Libraries Installation Programming GuideHardware Interrupt Clear Register Interrupt ControlTable of Contents ∙ What do you need VR Assignment Adjustment 9111utilHow to Use This Guide Page Features IntroductionSpecifications ApplicationsUnipolar 0~10V Bipolar -10V~+10V Software Supporting Programming LibraryDAQBenchTM ActiveX Controls PCIS-LVIEW LabVIEW DriverPCIS-VEE HP-VEE Driver DASYLabTM PROPCIS-ICL InControlTM Driver PCIS-OPC OPC ServerWhat You Have Installation∙ Software Installation Guide UnpackingPCI-9111s Layout PCB Layout of the PCI-9111Hardware Installation Outline Jumper DescriptionsDevice Installation for Windows Systems Connectors Pin Assignment∙ CN 1 Digital Signal Input DI 0 ~ ∙ CN 2 Digital Signal Output do 0 ~ ∙ CN 3 Analog Input/Output, Extended I/O, Trigger SignalsConnect with ACLD-9137 Daughter Board ConnectionConnect with ACLD-8125 Connect with ACLD-9182Registers Format PCI PnP RegistersAddress Write Read I/O Address MapA/D Data Registers I/O AddressBit A/D Channel Control RegisterAddress Base + 0h Attribute read only Data Format Address Base + 6h Attribute write only Data Format BitAddress Base + 6h Attribute read only Data Format Bit A/D Input Signal Range Control RegisterA/D Channel Read Back Register Address Base + 8h Attribute write only Data Format BitAddress Base + 8h Attribute read only Data Format Bit A/D Trigger Mode Control RegisterA/D Range and Status Read back Register Address Base + 0Ah Attribute write only Data Format BitMode Description Address Base + 0Eh Attribute write only Data Format BitAddress Base + 0Ch Attribute write only Data Format Bit Address Base + 48h Attribute write only Data Format Bit 12 A/D Mode & Interrupt Control Read Back RegisterHardware Interrupt Clear Register Address Base + 0Ah Attribute read only Data Format BitAddress Base + 4h Attribute write only Data Format Bit Address Base + 4h Attribute read only Data Format BitAddress Base + 2h Attribute read only Data Format 15 D/A Output Register Address Base + 2h Attribute write only Data Format BitAddress Base + 40h ~ Base + 46h Operation Theorem A/D Conversion1 A/D Conversion Procedure 2 A/D Signal Source ControlAnalog Input Signal Connection Signal Range 3 A/D Trigger Source Control4 A/D Data Transfer Modes External Trigger EITS=1, TPST=don‘t careFifo Half-Full Polling Pre-Trigger Control EOC Interrupt TransferTime 6 A/D Data Format FFFIRQ Level Setting Interrupt Control System ArchitectureDual Interrupt System Interrupt Source Control Extended Digital I/O PortD/A Conversion 44mV 88mVTimer/Counter Operation Introduction Digital Input and OutputPacer Trigger Source Pre-Trigger Counter4 I/O Address Libraries Installation ++ LibraryProgramming Guide Naming Convention Data Types++ DOS 9111Initial9111DO ++ Windows9111DOChannel 9111DI9111DIChannel 9111EDI9111EDO 10 9111EDOReadBack11 9111SetEDOFunction 12 9111DA 13 9111ADReadData14 9111ADReadDataRepeat 15 9111ADSetChannel16 9111ADGetChannel 17 9111ADSetRange Input Range Gain Gain Code18 9111ADGetRange 19 9111ADGetStatus20 9111ADSetMode 21 9111ADGetMode 22 9111INTSetReg24 9111ResetFIFO 23 9111INTGetReg25 9111ADSoftTrigger 26 9111Set825428 9111ADTimer 27 9111Get825429 9111CounterStart 30 9111CounterRead31 9111CounterStop 32 9111INTSourceControl 33 9111CLRIRQ 34 9111GetIRQChannel35 9111GetIRQStatus 36 9111ADFFHFPolling37 9111ADAquire 38 9111ADHRAquire39 9111ADINTStart 40 9111ADFFHFINTStart ++ Library ∙61 41 9111ADINTStatus 42 9111ADFFHFINTStatus43 9111ADFFHFINTRestart 44 9111ADINTStop Calibration What do you needA/D Adjustment VR AssignmentFunctions of VRs D/A Adjustment Unipolar Analog Output Bipolar Analog OutputSoftware Utility 9111utilRunning 9111util.exe System Configuration Calibration Functional Testing Function Testing Menu WindowIeeprom Product Warranty/Service