HP NuDAQ I-9111DG/HR manual Time

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software must continuously read data out from the FIFO to prevent FIFO full. The software also should poll the counter value to check if the A/D sampling is stopped.

To set up the Pre-Trigger mode, the following steps should be followed:

1.Set Pre-Trigger Mode Off: PTRG = OFF.

2.Set 8254 Counter #0 value N (N=1~65535). Note that the larger the counter value, the more host memory buffer is needed.

3.Set up A/D data acquire, including, A/D range, channel scan, data transfer mode and so on.

4.Set Pre-Trigger Mode On: PTRG = ON.

5.Read A/D data into host PC memory buffer by certain data transfer method, otherwise the FIFO will full. At the same time, wait the pre-trigger signal and check if the 8254 Counter # 0 value is down to zero.

6.If A/D is stopped, set the Pre-Trigger Mode off and process the data which stored in the host memory.

7.Go to Step 1 to set the Pre-Trigger mode and wait the next pre-trigger event.

The Pre-Trigger timing is shown as following:

Set Pre-Trigger

External Pre-Trigger

A/D Data

 

 

 

mode

Signal is Inserted

Acquisition Stop

 

 

 

 

 

 

Counter # 0 counting

 

 

 

 

 

 

 

from N down to 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Time

 

 

Acquire Infinite A/D data before

 

Acquire N A/D data after

 

 

 

 

 

 

 

 

 

Pre-trigger Signal is Inserted

 

 

 

 

Pre-Trigger Signal is Inserted

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

If the application acquires data after the pre-trigger signal, only the last N data need to be stored. The maximum value of N is 65535. If the application only needs to acquire data before the pre-trigger signal, set N=1 then just one more data will be sampled after pre-trigger signal and infinite data before pre-trigger signal can be stored.

Operation Theorem ∙29

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Contents NuDAQ Trademarks Questions Getting service from AdlinkPage Features Applications Specifications Software Supporting B l e o f C o n t e n t sPCI PnP Registers Address Map Interrupt Control Libraries Installation Programming GuideHardware Interrupt Clear Register ConversionTable of Contents ∙ 9111util What do you need VR Assignment AdjustmentHow to Use This Guide Page Introduction FeaturesApplications SpecificationsUnipolar 0~10V Bipolar -10V~+10V Programming Library Software SupportingDASYLabTM PRO PCIS-LVIEW LabVIEW DriverPCIS-VEE HP-VEE Driver DAQBenchTM ActiveX ControlsPCIS-OPC OPC Server PCIS-ICL InControlTM DriverUnpacking Installation∙ Software Installation Guide What You HavePCB Layout of the PCI-9111 PCI-9111s LayoutJumper Descriptions Hardware Installation OutlineDevice Installation for Windows Systems Connectors Pin Assignment∙ CN 1 Digital Signal Input DI 0 ~ ∙ CN 3 Analog Input/Output, Extended I/O, Trigger Signals ∙ CN 2 Digital Signal Output do 0 ~Connect with ACLD-9182 Daughter Board ConnectionConnect with ACLD-8125 Connect with ACLD-9137PCI PnP Registers Registers FormatI/O Address I/O Address MapA/D Data Registers Address Write ReadAddress Base + 6h Attribute write only Data Format Bit A/D Channel Control RegisterAddress Base + 0h Attribute read only Data Format BitAddress Base + 8h Attribute write only Data Format Bit A/D Input Signal Range Control RegisterA/D Channel Read Back Register Address Base + 6h Attribute read only Data Format BitAddress Base + 0Ah Attribute write only Data Format Bit A/D Trigger Mode Control RegisterA/D Range and Status Read back Register Address Base + 8h Attribute read only Data Format BitMode Description Address Base + 0Eh Attribute write only Data Format BitAddress Base + 0Ch Attribute write only Data Format Bit Address Base + 0Ah Attribute read only Data Format Bit 12 A/D Mode & Interrupt Control Read Back RegisterHardware Interrupt Clear Register Address Base + 48h Attribute write only Data Format BitAddress Base + 4h Attribute write only Data Format Bit Address Base + 4h Attribute read only Data Format BitAddress Base + 2h Attribute read only Data Format 15 D/A Output Register Address Base + 2h Attribute write only Data Format BitAddress Base + 40h ~ Base + 46h A/D Conversion Operation Theorem2 A/D Signal Source Control 1 A/D Conversion ProcedureAnalog Input Signal Connection 3 A/D Trigger Source Control Signal RangeExternal Trigger EITS=1, TPST=don‘t care 4 A/D Data Transfer ModesFifo Half-Full Polling EOC Interrupt Transfer Pre-Trigger ControlTime FFF 6 A/D Data FormatIRQ Level Setting Interrupt Control System ArchitectureDual Interrupt System Extended Digital I/O Port Interrupt Source Control44mV 88mV D/A ConversionDigital Input and Output Timer/Counter Operation IntroductionPacer Trigger Source Pre-Trigger Counter4 I/O Address ++ Library Libraries InstallationData Types Programming Guide Naming Convention++ Windows 9111Initial9111DO ++ DOS9111DI 9111DOChannel9111EDI 9111DIChannel10 9111EDOReadBack 9111EDO11 9111SetEDOFunction 13 9111ADReadData 12 9111DA15 9111ADSetChannel 14 9111ADReadDataRepeat16 9111ADGetChannel Input Range Gain Gain Code 17 9111ADSetRange19 9111ADGetStatus 18 9111ADGetRange20 9111ADSetMode 22 9111INTSetReg 21 9111ADGetMode23 9111INTGetReg 24 9111ResetFIFO26 9111Set8254 25 9111ADSoftTrigger27 9111Get8254 28 9111ADTimer30 9111CounterRead 29 9111CounterStart31 9111CounterStop 32 9111INTSourceControl 34 9111GetIRQChannel 33 9111CLRIRQ36 9111ADFFHFPolling 35 9111GetIRQStatus38 9111ADHRAquire 37 9111ADAquire39 9111ADINTStart 40 9111ADFFHFINTStart ++ Library ∙61 42 9111ADFFHFINTStatus 41 9111ADINTStatus43 9111ADFFHFINTRestart 44 9111ADINTStop What do you need CalibrationA/D Adjustment VR AssignmentFunctions of VRs Bipolar Analog Output D/A Adjustment Unipolar Analog OutputSoftware Utility 9111utilRunning 9111util.exe System Configuration Calibration Function Testing Menu Window Functional TestingIeeprom Product Warranty/Service
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