S3 Setting
8 7 6 5 4 3 2 1
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 0
0 0 0 0 0 0 0 1
0 0 0 1 0 0 0 1
0 0 0 0 0 0 1 0
0 0 0 1 0 0 1 0
0 0 0 0 0 0 1 1
0 0 0 1 0 0 1 1
0 0 0 0 0 1 0 0
0 0 0 1 0 1 0 0
0 0 0 0 0 1 0 1
0 0 0 1 0 1 0 1
0 0 0 0 0 1 1 0
0 0 0 1 0 1 1 1
0 0 0 0 1 0 0 0
0 0 0 0 1 0 0 1
0 0 0 1 1 0 0 1
0 0 0 0 1 0 1 0
0 0 0 0 1 0 1 1
0 0 0 0 1 1 0 0
0 0 0 0 1 1 0 1
0 0 0 0 1 1 1 0
Table 3-2. S3 Test Settings
Test Description
Start with blank front panel Front panel with all segments on VDAC minimum (TP16 = 0V) VDAC maximum (TP16 =
VDAC ramp slow (TP16, see waveform B) VDAC ramp fast (TP16, see waveform C) IDAC ramp slow (TP17, see waveform B) IDAC ramp fast (TP17, see waveform C) OVPDAC ramp (TP21, see waveform A) MUX/AD (Toggle S3 switch 5 to select input) SRST* and OVPRST$ pulse PWMENhigh
PWMEN low DOCAL pulse TRIGOUT (TOUT) pulse EEPROM read (U22 pin 4)2
Relay sequence (toggle S3 switch 5 to select relay)3 Tx pulses
1Tests multiplexer inputs. First measure voltage at Ul5 pin 4. Toggle S3 switch 5 until voltage at Ul5 pin 8 equals the voltage at U15 pin 4. Now each time S3 switch 5 is toggled, the multiplexer will sequence through its inputs. The input of the A/D
2Continuously reads the contents of location 0 of EEPROM. Check pulses at U22 pin 4.
3Tests relays