Texas Instruments TAS3002 manual Audio Control/Enhancement Functions, Soft Volume Update

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4 Audio Control/Enhancement Functions

4.1 Soft Volume Update

The TAS3002 device implements a TI proprietary soft volume update. This feature allows a smooth and pleasant-sounding change from one volume level to another over the entire range of volume control (18 dB to mute).

The volume is adjustable by downloading a gain coefficient through the I2C interface in 4.16 format—4 bits for the integer and 16 bits for the fractional part. NO TAG lists the 4.16 coefficients converted into dB for the range of – 70 dB to 18 dB with 0.5-dB step resolution.

Right and left channel volumes can be unganged and set to different values. This feature implements a balance control.

Volume is changed by writing the desired value into the volume control registers. This is done by asserting the volume-up or volume-down GPI terminal (see Section 7.6.1) for a limited range of volume control. Alternatively, volume control settings can be sent to the TAS3002 device over the I2C bus.

4.2 Software Soft Mute

Soft mute is implemented by loading all zeros in the volume control register. This causes the volume to ramp down over a duration of 2048fS samples to a final output of 0 (− infinity dB).

Soft mute can be enabled by either asserting the mute GPI terminal (see Section 7.6.1) or sending a mute command over the I2C bus. Subsequent assertions of the mute GPI terminal toggle soft mute off and on.

4.3 Input Mixer Control

The TAS3002 device is capable of mixing and multiplexing three channels (SDIN1, SDIN2, and the ADC output) of serial audio data. The mixing is controlled through three mixer control registers. This is accomplished by loading values into the corresponding bytes of the mixer left gain (07h) and mixer right gain (08h) control registers. See Figure 4−1 for a functional block diagram of the input mixer.

The values loaded into these registers are in 4.20 format—4 bits for the integer and 20 bits for the fractional part. NO TAG lists the 4.20 numbers converted into dB for the range of –70 dB to 18 dB, although any positive 4.20 number may be used.

To mute any of the channels, 0s are loaded into the respective mixer control register.

Mixer controls are updated instantly and can cause audible artifacts for large changes in setting when updated dynamically outside of the fast load mode; therefore, it is desirable to use fast load in conjunction with the soft-volume mode.

SDIN1, SDIN2, and the ADC output can be mixed with a user-selectable gain for each channel. The gain control registers are represented in 4.20 format.

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Contents 2001 Data ManualTAS3002 Digital Audio Processor With CodecIMPORTANT NOTICE 1 Introduction 1.2Features1.1 Description 1.3Functional Block Diagram Figure 1−1. TAS3002 Block Diagram Table 1−1. TAS3002 Terminal Functions 1.4 Terminal Assignments1.5 Terminal Functions Figure 1−2. TAS3002 Terminal AssignmentsTable 1−1. TAS3002 Terminal Functions Continued Page 2.1 Serial Interface Formats 2 Audio Data FormatsTable 2−1. Serial Interface Options … … … … … … … …2.2 Digital Output Modes … … … …… … … … 2.2.2I2S Serial-InterfaceFormatFigure 2−2. I 2S Serial-InterfaceFormat … … … …… … … … 2.2.3MSB-Left-Justified, Serial-InterfaceFormat… … … … … … … …tcSCLK SCLK LRCLK tdSDOUT SDOUT1 SDOUT2 SDOUT0 2.3 Switching CharacteristicsPARAMETER UNITPage 3.2.1Direct Analog Output 3 Analog Input/Output3.1 Analog Input 3.2 Analog OutputFigure 3−2. VCOM Decoupling Network 3.2.2Analog Output With GainFigure 3−3. Analog Output With External Amplifier TAS3002 3.2.3Reference Voltage FilterFigure 3−4. TAS3002 Reference Voltage Filter Page 4.3 Input Mixer Control 4.1 Soft Volume Update4 Audio Control/Enhancement Functions 4.2 Software Soft Mute4.5 Treble Control 4.4 Mono Mixer ControlFigure 4−1. TAS3002 Mixer Function 4.7 De-EmphasisMode DM 4.6 Bass ControlFigure 4−2. De-EmphasisMode Frequency Response Table 4−1. Analog Control Register Description 4.8 Analog Control Register 40h4.9.3Loudness Contour Operation 4.9 Dynamic Loudness Contour4.9.1Loudness Biquads 4.9.2Loudness Gain4.11 AllPass Function 4.10 Dynamic Range Compression/Expansion DRCETable 4−3. Main Control Register 2 Description 4.12 Main Control Register 1 01h4.13 Main Control Register 2 43h Table 4−2. Main Control Register 1 DescriptionPage 5.1.1Filter Coefficients Figure 5−1. Biquad Cascade Configuration5 Filter Processor 5.1 Biquad BlockPage Figure 6−1. Typical I 2C Data Transfer Sequence 6 I2C Serial Control Interface6.1 Introduction 6.2 I2C ProtocolTable 6−2. I 2C Address Byte Table 6.3 Operation6.3.1Write Cycle Example Table 6−1. I 2C Protocol Definitions6.3.3I2C Wait States 6.3.2TAS3002 I2C Readback ExampleTable 6−3. I 2C Wait States 6.4 SMBus Operation6.4.1Block Write Protocol 6.4.2Write Byte Protocol6.4.4TAS3002 SMBus Readback 6.4.3Wait StatesPage 7 Microcontroller Operation 7.2 Power-Up/Power-DownReset7.2.1Power-UpSequence 7.2.2ResetTAS3002 7.2.3Reset CircuitFigure 7−1. TAS3002 Reset Circuit 7.2.4Fast Load Mode7.2.5Codec Reset 7.3 Power-DownMode7.5 Internal Interface 7.3.1Power-DownTiming SequenceFigure 7−2. Power-DownTiming Sequence 7.4 Test ModeTable 7−1. GPI Terminal Programming 7.6.2GPI ArchitectureSlave Write GPI Power Down Figure 7−3. Internal Interface Flow ChartRestore Volume and MCR Start Power Up Initialize Default EEPROMTable 7−2. 512-ByteEEPROM Memory Map 2.0 Channels 7.7 External EEPROM Memory MapsTAS3002 ADDRESSBYTE NUMBER FUNCTIONCATEGORY TAS3002 ADDRESSNUMBER FUNCTIONCATEGORY TAS3002 ADDRESSNUMBER FUNCTIONStatic Digital Specifications 8 Electrical Characteristics8.2 Recommended Operating Conditions 8.4 ADC Digital Filter Figure 8−1. ADC Digital Filter Characteristics8.5 Analog-to-DigitalConverter Figure 8−4. ADC High-PassFilter Characteristics8.7 DAC Interpolation Filter 8.6 Input Multiplexer8.9 DAC Output Performance Data 8.8 Digital-to-AnalogConverterFigure 8−7. I 2C Bus Timing 8.10 I2C Serial Port Timing CharacteristicsClock 9 System DiagramsFigure 9−1. Stereo Application TAS3002Figure 9−2. TAS3002 Device, 2.1 Channels TAS3001TAS3002 PFB S-PQFP-G48 10 Mechanical InformationPLASTIC QUAD FLATPACK 10−2
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