4.8 Analog Control Register (40h)
The analog control register (ACR) allows control of
An I2C master is required to write the appropriate command into the ACR. The ACR subaddress is 40h.
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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Type | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
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Default | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
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| Table 4−1. Analog Control Register Description | ||
BIT | FIELD NAME | TYPE |
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| DESCRIPTION |
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7 | Reserved | R/W |
| Reset to 0 | |
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6 | Reserved | R/W |
| Reset to 0 | |
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5−4 | Reserved | R/W |
| Reserved. Bits 5 and 4 return 0s when read. | |
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3−2 | DM(1−0) | R/W |
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| 00 = | |
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| 01 = 48 kHz sample rate | |
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| 10 = 44.1 kHz sample rate | |
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| 11 = Reserved | |
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1 | INP | R/W |
| Analog input select | |
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| 0 | = LINA and RINA selected (initial condition after reset) |
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| 1 | = LINB and RINB selected |
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0 | APD | R/W |
| Analog power down | |
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| 0 | = Normal operation (initial condition after reset) |
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| 1 | = Power down |
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4−4