AMD manual Clock Control, Preliminary Information, AMD Athlon XP Processor Model 8 Data Sheet

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4.3Clock Control

Preliminary Information

AMD Athlon™ XP Processor Model 8 Data Sheet

25175H— March 2003

4.3Clock Control

The processor implements a Clock Control (CLK_Ctl) MSR (address C001_001Bh) that determines the internal clock divisor when the AMD Athlon system bus is disconnected.

Refer to the AMD Athlon™ and AMD Duron™ Processors BIOS, Software, and Debug Developers Guide, order# 21656, for more details on the CLK_Ctl register.

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Power Management

Chapter 4

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AMD manual Clock Control, Preliminary Information, AMD Athlon XP Processor Model 8 Data Sheet, Power Management, Chapter