AMD Preliminary Information, AMD Athlon XP Processor Model 8 Data Sheet, K7CLKOUT and, NC Pins

Models: 8

1 106
Download 106 pages 35.4 Kb
Page 90
Image 90
K7CLKOUT and

Preliminary Information

AMD Athlon™ XP Processor Model 8 Data Sheet

25175H— March 2003

K7CLKOUT and

K7CLKOUT and K7CLKOUT# are each run for two to three

K7CLKOUT# Pins

inches and then terminated with a resistor pair: 100 ohms to

 

VCC_CORE and 100 ohms to VSS. The effective termination

 

resistance and voltage are 50 ohms and VCC_CORE /2.

Key Pins

These 16 locations are for processor type keying for forwards

 

and backwards compatibility (G7, G9, G15, G17, G23, G25, N7,

 

Q7, Y7, AA7, AG7, AG9, AG15, AG17, AG27, and AG29).

 

Motherboard designers should treat key pins like NC (No

 

Connect) pins. A socket designer has the option of creating a

 

top mold piece that allows PGA key pins only where designated.

 

However, sockets that populate all 16 key pins must be allowed,

 

so the motherboard must always provide for pins at all key pin

 

locations.

 

See “NC Pins” for more information.

NC Pins

The motherboard should provide a plated hole for an NC pin.

 

The pin hole should not be electrically connected to anything.

NMI Pin

NMI is an input from the system that causes a non-maskable

 

interrupt.

PGA Orientation Pins

No pin is present at pin locations A1 and AN1. Motherboard

 

designers should not allow for a PGA socket pin at these

 

locations.

 

For more information, see the AMD Athlon™ Processor-Based

 

Motherboard Design Guide, order# 24363.

PLL Bypass and Test

PLLTEST#, PLLBYPASS#, PLLMON1, PLLMON2,

Pins

PLLBYPASSCLK, and PLLBYPASSCLK# are the PLL bypass

 

and test interface. This interface is tied disabled on the

 

motherboard. All six pin signals are routed to the debug

 

connector. All four processor inputs (PLLTEST#, PLLBYPASS#,

 

PLLMON1, and PLLMON2) are tied to VCC_CORE with pullup

 

resistors.

PWROK Pin

The PWROK input to the processor must not be asserted until

 

all voltage planes in the system are within specification and all

 

system clocks are running within specification.

 

For more information, Chapter 9, “Signal and Power-Up

 

Requirements” on page 45.

78

Pin Descriptions

Chapter 11

Page 90
Image 90
AMD manual Preliminary Information, AMD Athlon XP Processor Model 8 Data Sheet, K7CLKOUT and, K7CLKOUT# Pins, Key Pins