AMD 8 manual List of Figures, Preliminary Information

Preliminary Information

25175H —March 2003 AMD Athlon™ XP Processor Model 8 Data Sheet

List of Figures

Figure 1. Typical AMD Athlon™ XP Processor Model 8 System

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Figure 2. Logic Symbol Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 3. AMD Athlon XP Processor Model 8 Power Management States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 4. AMD Athlon System Bus Disconnect Sequence in the

Stop Grant State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 5. Exiting the Stop Grant State and Bus Connect Sequence . . . . 15

Figure 6. Northbridge Connect State Diagram . . . . . . . . . . . . . . . . . . . . . 16

Figure 7. Processor Connect State Diagram . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 8. SYSCLK Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 9. SYSCLK Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 10. VCC_CORE Voltage Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 11. SYSCLK and SYSCLK# Differential Clock Signals . . . . . . . . . 37

Figure 12. General ATE Open-Drain Test Circuit. . . . . . . . . . . . . . . . . . . . 41

Figure 13. Signal Relationship Requirements During Power-Up
	Sequence	45
Figure 14. AMD Athlon XP Processor Model 8 Part Number
	27291 OPGA Package	52
Figure 15.	AMD Athlon XP Processor Model 8 Part Number
	27648 OPGA Package	54
Figure 16.	AMD Athlon XP Processor Model 8 Pin Diagram
	—Topside View	56
Figure 17.	AMD Athlon XP Processor Model 8 Pin Diagram
	—Bottomside View	57
Figure 18.	OPN Example for the AMD Athlon XP Processor
	Model 8	81

List of Figures 7