Band circuits | American Telecom AM64/128A specs

Glossary	AM64/128A User Manual

V.24	CCITT specification. List of definitions for interchange circuits between DTE and DCE.
V.28	CCITT specification. Electrical characteristics for unbalanced double-current interchange
	circuits. (V.28 Interchange circuits defined in V.24)
V.35	CCITT specification. Data transmission at 48kbit/s using 60-108kHz group band circuits.
V.36	CCITT specification. Modems for synchronous data transmission using 60-108kHz group
	band circuits.
X.21	CCITT specification. Interface between DTE and DCE for synchronous operation on public
	data networks.
X.21 bis	CCITT specification. Use on public data networks of DTE which is designed for interfacing
	to synchronous V-series modems.
X50 Div 2/3	CCITT specification. Fundamental parameters of a multiplexing scheme for the
	international interface between synchronous data networks. (80 and 20 bit patterns)

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American Telecom AM64/128A manual Band circuits

Contents

ATL Part No /203/002/610 Issue 4 September Base Band Modem Information Contained This Document is Confidential to Contents Appendix B Introduction International Models Interface Modules Constructional DetailsBaseband Modems System Overview System Overview BBM to BBM Link InstallationTesting Self Test Pass LTU Ready No Alarm LTU Not Ready Link Mode Network Mode BBM to Line Card Link Front Panel Features Menu Operation Loop back Off Loop back On Loop Active Status MenuOver all Status LOS/CD Fail Alarm StatusNo Alarm No Signal Receiving AIS No Alignment CD Fail Interface Status User RateLine Rate Operating Mode Link Mode Network Mode Local loop from menu Top level display shows Loc Loop Off Test MenuLocal loop Loc Loop On Loopback is applied by selecting the display Loopback Off LoopbackLocal loop from DTE Loopback On Rem Loop Off Remote LoopRemote Loop from menu Rem Loop On Bin Keys Off Sending Bin Binary PatternsRemote loop from DTE Overview Error Count Bit Error Rate BER = User Data Rate x TimeData Test Operation Errors Errors nnnnnnErrors s000001 Data Test Injecting 0s Injection ModeTransparent Mode Injecting 1s Comms Evp Rx Evp Tx Service TestSvc Test Time If the count is stopped the display is Stop Lamp Test Self Test Communication Channel Loopback Comm Loop Off Rate Menu Rate 4.8K Master 64K BT Slave 4.8K Option Menu 2 X.21bis 3 G.703 Asynchronous ModeSignalling Rate Character Length Char Len Line Rate Configuration MenuMaster Slave Synchronisation Type for software versions below 3 X.21 Loop ControlModem Ext Bit Clk Synchronisation Type for software version V1.3 and aboveExt Byte Clk Internal Clk Menu Lock 5 64k ModePower Level Glossary of Terms Band circuits General Specifications Appendix a Interface Pin Connections Way D type X.21 bis V.24 / V.28* Connector pin allocationWay D-type X.21 V.11 Connector pin allocation Mrac Connector Pin allocation Way D-type V.36 Connector pin allocation Way D-type RS-530 Connector pin allocation Line Connector Appendix B Internal Link Settings Page Interface Modules Interface Module RS530 Interface Module 21bis Interface Module Service Test Facilities Frame Structure Appendix C In Service Test LVD Safety Statements TTE Network and Safety statements Appendix E 21 bit timing cable 15 way to 15 way D type plugs 35 bit timing cable 34 way to 34 way Mrac plugs 21 byte timing cable 15 way to 15 way D type plugs24 / V.28 bit timing cable 25 way to 25 way D type plugs 21 bis V.36 bit timing cable 37 way to 37 way D type plugs RS530 bit timing cable 25 way to 25 way D type plugs Appendix F Troubleshooting Master Mode C 64K Rate Slave Mode 64K RatePower 10dBm Rate 64K