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ADSP-21020
External Memory
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| K/B/T Grade | K/B/T Grade | B/T Grade | K Grade |
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| 20 MHz | 25 MHz | 30 MHz | 33.3 MHz | Frequency Dependency* |
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Parameter | Min | Max | Min | Max | Min | Max | Min | Max | Min | Max | Unit | ||||||
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Timing Requirement: |
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tSTS |
| , Setup before CLKIN High | 14 | 50 | 12 | 40 | 10 | 33 | 9 | 30 | 14 + DT/4 | tCK | ns | ||||
xTS | |||||||||||||||||
tDADTS | xTS | Delay after Address, Select |
| 28 |
| 19 |
| 13 |
| 10 |
| 28 + 7DT/8 | ns | ||||
tDSTS | xTS | Delay after | XRD | , | XWR | Low |
| 16 |
| 11 |
| 7 |
| 6 |
| 16 + DT/2 | ns |
Switching Characteristic: |
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tDTSD | Memory Interface Disable before |
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| CLKIN High | 0 |
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| DT/4 |
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tDTSAE |
| High to Address, Select Enable | 0 |
| 0 |
| 0 |
| 0 |
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| ns | ||||
xTS |
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NOTES
*DT = tCK – 50 ns.
xTS should only be asserted (low) during an active memory access cycle.
Memory Interface =
x = PM or DM.
CLKIN
tSTS | tSTS |
PMTS, DMTS
tDADTS
t DSTS | tDTSD |
xRD, xWR
t DTSAE
ADDRESS,
SELECTS
DATA
Figure 9. External Memory Three-State Control
REV. C |