H

headphone out jack (P7), xi, 2-22Help, online, xix

INDEX

master input clock (MCLK), 1-9~MS2-0,memory select pins, 1-7~MS3, memory select pin, 1-7, 1-12

I

installation, of this EZ-KIT Lite, 1-4interrupts, configuring push buttons as, 1-11IO voltage, 2-2

J

JTAG

emulation port, 2-8header (P2), xii, 2-25

jumpers

diagram of locations, 2-17JP1 (VCO select), 2-17JP2 (ELVIS select), 2-19JP3 (voltage select), 2-19

JP4 (ELVIS programmable flag), 2-20JP6 (ELVIS voltage), 2-19

L

LabVIEW virtual instruments, xi, 1-9LEDs

connections, 1-11diagram of locations, 2-14LED10 (reset), 1-4, 2-15LED11 (USB monitor), 1-5, 2-16LED12 (USB reset), 1-4, 2-15LED1-7 (FLAGx IO), 1-12, 2-14LED8 (FLAG3), 1-12, 2-6, 2-14LED9 (power), 1-4, 2-14

license restrictions, 1-6

loop-back test switches (SW6, SW14), 2-12

M

master clock (MCLK), 1-9

N

notation conventions, xxii

O

oscilloscope config switch (SW1), 2-13

P

package contents, 1-2

parallel flash memory, See flash memory parallel port (PP) control signals, 2-7phase lock loop (PLL), xii, 2-4,2-17PMCTLx register, 2-3

power

connector (J4), 2-22LED (LED9), 2-14specifications, 2-23supply, 2-19, 2-23

push buttons connections, 1-11diagram of locations, 2-14

enable switch (SW7), 1-4, 1-11, 2-12, 2-16reference designators, See switches by name

(SWx)

R

RCA cables, 1-3

connectors, xi, 1-10, 2-4registration, of this product, 1-3reset

processor, 2-15

push button (SW12), 2-17restrictions, license, 1-6RS-232 connector (P1), xi, 2-23

ADSP-21369 EZ-KIT Lite Evaluation System Manual

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Analog Devices ADSP-21369 system manual Jtag