ELVIS Interface
The SPI flash memory connects to the SPI port of the processor and designates:
•DPI pin 5 (DPI5) as a chip select
•DPI pin 3 (DPI3) as the SPI clock
•DPI pin 1 (DPI1) as the MOSI
•DPI pin 2 (DPI2) as the MISO.
By default, the DPI is setup for the SPI flash, and any required changes to the SPI flash can be made by modifying the DPI of the processor. An example program is included in the
The asynchronous SRAM memory and the parallel flash memory connect to the asynchronous memory controller of the processor. Each of their respective memory banks can be independently programmed with differ- ent timing parameters. For more information on changing wait states to speed up or slow down the asynchronous controller and other setup infor- mation, refer to the
ELVIS Interface
The
