57
4929B–AUTO–01/07
ATA6264 [Preliminary]
Figure 17-2. Timing LIN/ISO 9141 Interface
16.37 Propagation delay K1 high to
RxD1=high
Measured from
K1=0.6×VK30 to
RxD1=LtoH
K1tPDkH 4µsA
16.38 Symmetry of transmitter
delay tSYM_T1=t
PDtL–t
PDtH K1tSYM_T1 –1 1 µs A
16.39 Symmetry of receiver
propagation delay tSYM_R1=t
PDkL–t
PDkH K1tSYM_R1 –1 1 µs A
LS Driver Mode
16.40 Kx output voltage drop IKx=40mA
IKx=20mA KxVKx 1.7
1.2 VA
16.41 Kx switch-on delay
(x = 1, 2), measured from
rising edge of SSQ to
VKx= 16.40V, RKx =250Ω to
K30, CKx= 3.3 nF to GNDB
KxtKx 50 µs A
16.42 Kx switch-off delay
(x = 1, 2), measured from
rising edge of SSQ to
VKx=0.9×VK30,
RKx= 250Ω to K30,
CKx= 3.3 nF to GNDB
KxtKx 10 µs A
16.43 Kx leakage current
(x = 1, 2), output driver
deactivated, AMUX
measurement activated and
deactivated
K30 = 5.5V to 15V
K30 > 15V to 25V
K30 > 25V to 40V
KxIKx –10
–10
–10
+100
+160
+260
µA
µA
µA
A
A
A
16.44 Kx leakage current
(x = 1, 2), output driver
deactivated, AMUX
measurement deactivated
K30 = 5.5V to 40V
Kx = –25V
KxIKx –150 +10 µA A
Table 17-1. Electrical Characteristics (Continued)–LIN/ISO 9141 Interfaces
No. Parameters Test Conditions Pin Symbol Min Typ. Max. Unit Type*
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
90%
Baudrate
Baudrate = t
on
+ t
off
2
60%
40% 10%
t
PDtL
V
K
V
TXD
V
RXD
2
t
PDkL
t
PDkH
t
PDtH