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4929B–AUTO–01/07
ATA6264 [Preliminary]
23. Test Mode
For better testability of the ATA6264, a test mode is implemented. This mode is activated if the
pins RESQ and TxD1 are connected to GND, the pins RESQ2 and TxD2 are connected to
VPERI, and the serial interface command 5A5Ah is sent to the ATA6264. Test mode is latched
as long as the ATA6264 is powered (VK30 > 4.2V to 5V and VK15 > 3V to 4V). In Test mode the
watchdog is disabled, which means that RESQ and RESQ2 depend on the voltage levels of the
pins VCORE, VPERI and EVZ. In order to provide the programming voltage at VSAT for the ini-
tial programming, VVSAT is set to 11.7V (±0.5V) in Test mode if the lock bit is not set.
After a reset, Test mode is disabled (default).
The following serial interface commands are used for the ATA6264 supplier test: E6B5(h) and
E6BA(h).
Figure 23-1. How to Enable Test Mode
VPERI
SPI
decoder
Enable
testmode
TxD2
RESQ2
TxD1
RESQ
5A5A (h)
SSQ
MISO
MOSI
SCLK