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IQ-USM 810 Service Manual

Figure 3.9 SHARC Pinout

The time allotted for the SHARC to process this audio data is 330us (16 samples x 48-kHz). At that point the next audio brick has been collected and is ready for processing. The processed output audio brick is then deposited into SRAM (U5, U6). The audio bricks are then taken by the Output SHARC's for mixing and out- put processing. SHARC 2 (U26) processes Main A and Outputs 1-4 while SHARC 3 (U28) is responsible for Main B and Outputs 5-8. If additional delay is required, the bricks are allowed to remain in SDRAM before pro- cessing. The minimum delay through the audio process- ing is as follows:

• A/D Conversion

667us

• 5x "brick" delay

1667us

• DAC Conversion

520us

• Total Delay

2854us

This delay is constant and not dependent upon the particular processing being done.

SDRAM provides a high speed synchronous memory resource. Only the four SHARC processors have ac- cess to SDRAM and they are responsible for the ac- cess and maintenance of it. Each SHARC monitors the

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Circuit Theory 3-7

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Crown Audio IQ-USM 810 service manual Sharc Pinout