Cypress manual CY7C0837AV, CY7C0830AV CY7C0831AV, CY7C0832AV CY7C0832BV, CY7C0833AV, + Feedback

CY7C0837AV, CY7C0830AV

CY7C0831AV, CY7C0832AV

CY7C0832BV, CY7C0833AV

Switching Waveforms (continued)

Figure 16. Readback State of Address Counter or Mask Register[43, 44, 45, 46]

CLK

EXTERNAL

ADDRESS A0–A16

	tCYC2
	tCH2	tCL2
tSA	tHA
An

tCA2 or tCM2

An*

INTERNAL ADDRESS

AnAn+1

tSAD tHAD

ADS

		tSCN tHCN
	CNTEN
DATAOUT					tCD2		tCKHZ
			Qx-2	Qx-1		Qn

LOAD READBACK INCREMENT

EXTERNAL COUNTER

ADDRESS INTERNAL

ADDRESS

tCKLZ

Qn+1 Qn+2 Qn+3

Notes

43.CE0 = OE = BE0 – BE1 = LOW; CE1 = R/W = CNTRST = MRST = HIGH.

44.Address in output mode. Host must not be driving address bus after tCKLZ in next clock cycle.

45.Address in input mode. Host can drive address bus after tCKHZ.

46.An * is the internal value of the address counter (or the mask register depending on the CNT/MSK level) being Read out on the address lines.

Document #: 38-06059 Rev. *S Page 20 of 28

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