Cypress manual CY7C0837AV, CY7C0830AV CY7C0831AV, CY7C0832AV CY7C0832BV, CY7C0833AV

CY7C0837AV, CY7C0830AV

CY7C0831AV, CY7C0832AV

CY7C0832BV, CY7C0833AV

Figure 3. Counter, Mask, and Mirror Logic Block Diagram [1]

CNT/MSK

CNTEN

ADS

CNTRST

MRST

Bidirectional

Address

Lines

CLK

Decode

Logic

Mask

Register

Counter/

Address

Register

Address

Decode

RAM Array

From	17	Load/Increment
Address	Mirror		Counter
Lines		1		To Readback
		1		and Address
		0		Decode
From	17	0
Mask	Increment
Register	Logic	Wrap		17

From	17	17
Mask	17	Bit 0
From
		+1	Wrap
Counter				Wrap
		1	Detect
		0
		+2	17
		1		To
		0		Counter

Document #: 38-06059 Rev. *S Page 9 of 28

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