Cypress CY7C0832BV manual Switching Characteristics, a Normal Load Load, b Three-state Delay Load

CY7C0837AV, CY7C0830AV

CY7C0831AV, CY7C0832AV

CY7C0832BV, CY7C0833AV

Figure 6. AC Test Load and Waveforms

Z0 = 50Ω

OUTPUT

C = 10 pF

R = 50Ω

OUTPUT

3.3V

R1 = 590 Ω

VTH = 1.5V

C = 5 pF

R2 = 435 Ω

(a) Normal Load (Load 1)

(b) Three-state Delay (Load 2)

ALL INPUT PULSES

3.0V

Vss

< 2 ns

	90%	90%
			10%
10%

< 2 ns

Switching Characteristics

Over the Operating Range

-167

-133

-100

CY7C0837AV

CY7C0837AV

CY7C0830AV

CY7C0830AV

Parameter

Description

CY7C0831AV

CY7C0833AV

CY7C0833AV

Unit

CY7C0831AV

CY7C0832AV

CY7C0832AV

CY7C0832BV

Min

Max

Min

Max

Min

Max

Min

Max

fMAX2

Maximum Operating Frequency

167

133

133

100

MHz

tCYC2

Clock Cycle Time

6.0

7.5

7.5

10

ns

tCH2

Clock HIGH Time

2.7

3.0

3.0

4.0

ns

tCL2

Clock LOW Time

2.7

3.0

3.0

4.0

ns

tR[27]

Clock Rise Time

2.0

2.0

2.0

3.0

ns

tF[27]

Clock Fall Time

2.0

2.0

2.0

3.0

ns

tSA

Address Setup Time

2.3

2.5

2.5

3.0

ns

tHA

Address Hold Time

0.6

0.6

0.6

0.6

ns

tSB

Byte Select Setup Time

2.3

2.5

2.5

3.0

ns

tHB

Byte Select Hold Time

0.6

0.6

0.6

0.6

ns

tSC

Chip Enable Setup Time

2.3

2.5

NA

NA

ns

tHC

Chip Enable Hold Time

0.6

0.6

NA

NA

ns

tSW

R/W

Setup Time

2.3

2.5

2.5

3.0

ns

tHW

R/W

Hold Time

0.6

0.6

0.6

0.6

ns

tSD

Input Data Setup Time

2.3

2.5

2.5

3.0

ns

tHD

Input Data Hold Time

0.6

0.6

0.6

0.6

ns

tSAD

ADS

Setup Time

2.3

2.5

NA

NA

ns

tHAD

ADS

Hold Time

0.6

0.6

NA

NA

ns

tSCN

CNTEN

Setup Time

2.3

2.5

NA

NA

ns

tHCN

CNTEN

Hold Time

0.6

0.6

NA

NA

ns

tSRST

CNTRST

Setup Time

2.3

2.5

NA

NA

ns

tHRST

CNTRST

Hold Time

0.6

0.6

NA

NA

ns

tSCM

CNT/MSK

Setup Time

2.3

2.5

NA

NA

ns

Note

27. Except JTAG signals (tr and tf < 10 ns [max.]).

Document #: 38-06059 Rev. *S Page 13 of 28

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