Cypress CY7C0850AV, CY7C0851AV, CY7C0852AV, CY7C0853AV JTAG Timing

CY7C0850AV, CY7C0851AV
CY7C0852AV, CY7C0853AV
Document #: 38-06070 Rev. *H Page 16 of 32
JTAG Timing
Parameter Description 167/133/100 Unit
Min Max
fJTAG Maximum JTAG TAP Controller Frequency 10 MHz
tTCYC TCK Clock Cycle Time 100 ns
tTH TCK Clock HIGH Time 40 ns
tTL TCK Clock LOW Time 40 ns
tTMSS TMS Setup to TCK Clock Rise 10 ns
tTMSH TMS Hold After TCK Clock Rise 10 ns
tTDIS TDI Setup to TCK Clock Rise 10 ns
tTDIH TDI Hold After TCK Clock Rise 10 ns
tTDOV TCK Clock LOW to TDO Valid 30 ns
tTDOX TCK Clock LOW to TDO Invalid 0 ns
Figure 7. JTAG Switching Waveform
Test Clock
Test Mode Select
TCK
TMS
Test Data-In
TDI
Test Da ta- Ou t
TDO
tTCYC
tTMSH
tTL tTH
tTMSS
tTDIS tTDIH
tTDOX tTDOV
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