Manuals / Cypress / Computer Equipment / Computer Hardware

Cypress manual Package Diagrams, CY7C1470V25 CY7C1472V25 CY7C1474V25, + Feedback

Models: CY7C1474V25 CY7C1470V25 CY7C1472V25

1 28

Download 28 pages 61.29 Kb

Page 24

Image 24

CY7C1470V25

CY7C1472V25

CY7C1474V25

Package Diagrams

100-Pin Thin Plastic Quad Flatpack (14 x 20 x 1.4 mm) (51-85050)

16.00±0.20

14.00±0.10

1.40±0.05

100	81
1	80

22.00±0.20

20.00±0.10

0.30±0.08

0.65	12° ±1°
TYP.	(8X)

SEE DETAIL

0.20 MAX.

1.60 MAX.

R 0.08 MIN. 0.20 MAX.

0.25

0° MIN.

SEATING PLANE

STAND-OFF

0.05 MIN.NOTE:

0.15 MAX.

0.10

GAUGE PLANE

0° -7°

0.60±0.15

1.00 REF.

R 0.08 MIN. 0.20 MAX.

0.20 MIN.

DETAIL A

1.JEDEC STD REF MS-026

2.BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PER SIDE BODY LENGTH DIMENSIONS ARE MAX PLASTIC BODY SIZE INCLUDING MOLD MISMATCH

3.DIMENSIONS IN MILLIMETERS

51-85050-*B

Document #: 38-05290 Rev. *I

Page 24 of 28

[+] Feedback

Page 24

Image 24

Cypress manual Package Diagrams, CY7C1470V25 CY7C1472V25 CY7C1474V25, Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm

Contents

Features Logic Block Diagram-CY7C1470V25 2M xCY7C1470V25 CY7C1472V25 CY7C1474V25 Functional DescriptionLogic Block Diagram-CY7C1472V25 4M x Logic Block Diagram-CY7C1474V25 1M xSelection Guide CY7C1470V25 CY7C1472V25 CY7C1474V25Pin Configurations 100-pin TQFP Pinout CY7C1470V25 CY7C1472V25 CY7C1474V25CY7C1470V25 2M ×Pin Configurations continued 165-ball FBGA 15 x 17 x 1.4 mm Pinout CY7C1470V25 2M xCY7C1472V25 4M x CY7C1470V25 CY7C1472V25 CY7C1474V25Pin Configurations continued 209-ball FBGA 14 x 22 x 1.76 mm Pinout CY7C1474V25 1M xPin Definitions CY7C1470V25 CY7C1472V25 CY7C1474V25CY7C1470V25 CY7C1472V25CY7C1474V25 Pin Definitions continuedSingle Read Accesses Burst Read AccessesSingle Write Accesses Burst Write AccessesZZ Mode Electrical Characteristics Linear Burst Address Table MODE = GNDInterleaved Burst Address Table MODE = Floating or VDD CY7C1470V25 CY7C1472V25 CY7C1474V25Partial Write Cycle Description1, 2, 3 CY7C1470V25 CY7C1472V25 CY7C1474V25TAP Controller Block Diagram TAP Controller State DiagramIEEE 1149.1 Serial Boundary Scan JTAG Test MODE SELECT TMSInstruction Register Bypass RegisterBoundary Scan Register Identification ID RegisterTAP AC Switching Characteristics Over the Operating Range9 TAP TimingBYPASS ReservedTAP DC Electrical Characteristics And Operating Conditions 2.5V TAP AC Test Conditions1.8V TAP AC Test Conditions 2.5V TAP AC Output Load EquivalentScan Register Sizes Identification CodesCY7C1470V25 CY7C1472V25Boundary Scan Exit Order 2M Boundary Scan Exit Order 4M xCY7C1470V25 CY7C1472V25 CY7C1474V25 Boundary Scan Exit Order 1M x CY7C1470V25 CY7C1472V25 CY7C1474V25Electrical Characteristics Over the Operating Range12 Maximum RatingsOperating Range TemperatureCapacitance14 Thermal Resistance14AC Test Loads and Waveforms CY7C1470V25 CY7C1472V25 CY7C1474V25Switching Characteristics Over the Operating Range 15 CY7C1470V25 CY7C1472V25 CY7C1474V25Switching Waveforms CY7C1470V25 CY7C1472V25 CY7C1474V25Read/Write/Timing21, 22 Switching Waveforms continued CY7C1470V25 CY7C1472V25 CY7C1474V25NOP, STALL and DESELECT Cycles21, 22 ZZ Mode Timing25Ordering Information CY7C1470V25 CY7C1472V25 CY7C1474V25Ordering Information continued CY7C1470V25 CY7C1472V25 CY7C1474V25Package Diagrams CY7C1470V25 CY7C1472V25 CY7C1474V25100-Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm + FeedbackPackage Diagrams CY7C1470V25 CY7C1472V25 CY7C1474V25165-Ball FBGA 15 x 17 x 1.4 mm Page 25 ofPackage Diagrams continued CY7C1470V25 CY7C1472V25 CY7C1474V25209-Ball FBGA 14 x 22 x 1.76 mm + FeedbackDocument History Page Issue DateCY7C1470V25 CY7C1472V25 CY7C1474V25 Document NumberCY7C1470V25 CY7C1472V25 CY7C1474V25 Page 28 of