Sda

CY7C64215

Figure 8. Definition for Timing for Fast/Standard Mode on the I2C Bus

SDA	TLOWI2C
	TLOWI2C		TSUDATI2C
			TSUDATI2C
SCL
S	T	THDDATI2C	T	TSUSTAI2C	Sr
	HDSTAI2C		HIGHI2C

THDSTAI2C

TSPI2C		TBUFI2C

TSUSTOI2C	P	S

Document 38-08036 Rev. *C

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Contents

Cypress Semiconductor Corporation 198 Champion Court FeaturesBlock Diagram San Jose, CA Document 38-08036 Rev. *C Revised December 08 EnCoRe III Core ApplicationsEnCoRe III Functional Overview Digital System Getting Started EnCoRe III Device CharacteristicsEnCoRe III Device Characteristics Additional System Resources PSoC Designer Software Subsystems Development ToolsDevelopment Kits Device Editor Designing with User Modules Hardware Tools Debugger DeviceEditorApplicationEditor Generate Application Units of Measure Document ConventionsAcronyms Used Numeric Naming Pin Part Pinout Pin Part Pinout MLF CY7C64215 56-Pin enCoRe III Device P07 Analog column mux input Pin Part Pinout SsopCY7C64215 28-Pin enCoRe III Device P05 Analog column mux input and column Output Register Conventions Description Register ReferenceRegister Mapping Tables Name Addr 0,Hex Access Register Map Bank 0 Table User Space Register Map Bank 1 Table Configuration Space Name Addr Access Hex Electrical Specifications Units of Measure Symbol Unit of Measure Absolute Maximum Ratings Parameter Description Min Typ Unit Operating TemperatureAbsolute Maximum Ratings DC General Purpose IO Specifications DC Electrical CharacteristicsDC Chip-Level Specifications DC Full-Speed USB Specifications DC Analog Output Buffer Specifications P24 DC Analog Reference SpecificationsSupply Voltage Rejection Ratio RefHi = P24 + P26 P24 = Vdd/2, P26 = P24 + P26 + DC Analog enCoRe III Block SpecificationsResistor Unit Value Continuous Time 12.2 P24 P26 P24 P26 + DC POR and LVD Specifications DC Programming Specifications AC Electrical Characteristics AC Chip-Level Specifications AC General Purpose IO Specifications AC Full-Speed USB Specifications AC Digital Block Specifications AC External Clock Specifications Large Signal Bandwidth, 1Vpp, 3-dB BW, 100 pF Load AC Analog Output Buffer SpecificationsMHz Power = Low Power = High KHz Power = Low Power = High AC Programming Specifications AC I2C Specifications SDA Package Diagrams Packaging Information Thermal Impedance for the Package Typical θ JA Solder Reflow Peak TemperatureThermal Impedance Parameter Description Min Typical Max Unit Package HandlingOrdering Information Ordering Code Flash Size Sram Bytes Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC Solutions

Cypress CY7C64215 manual Sda

Models: CY7C64215

Figure 8. Definition for Timing for Fast/Standard Mode on the I2C Bus

SCL