CY7C64215
DC Electrical Characteristics
DC Chip-Level Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < TA < 70°C, or 3.0V to 3.6V and 0°C < TA < 70°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are for design guidance only.
Table 8. DC
Parameter
Description
Min Typ Max Unit
Notes
Vdd | Supply Voltage | 3.0 | – | 5.25 | V | See DC POR and LVD specifications, Table |
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| 16 on page 19. USB hardware is not |
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| functional when Vdd is between 3.6V - 4.35V. |
IDD5 | Supply Current, IMO = 24 MHz (5V) | – | 14 | 27 | mA | Conditions are Vdd = 5.0V, TA = 25°C, CPU |
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| = 3 MHz, SYSCLK doubler disabled, VC1 = |
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| 1.5 MHz, VC2 = 93.75 kHz, VC3 = 93.75 kHz, |
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| analog power = off. |
IDD3 | Supply Current, IMO = 24 MHz (3.3V) | – | 8 | 14 | mA | Conditions are Vdd = 3.3V, TA = 25°C, CPU |
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| = 3 MHz, SYSCLK doubler disabled, VC1 = |
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| 1.5 MHz, VC2 = 93.75 kHz, VC3 = 0.367 kHz, |
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| analog power = off. |
ISB | Sleep (Mode) Current with POR, LVD, Sleep | – | 3 | 6.5 | μA | Conditions are with internal slow speed oscil- |
| Timer, and WDT.[2] |
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| lator, Vdd = 3.3V, 0°C < T < 55°C, analog |
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| A |
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| power = off. |
ISBH | Sleep (Mode) Current with POR, LVD, Sleep | – | 4 | 25 | μA | Conditions are with internal slow speed oscil- |
| Timer, and WDT at high temperature.[2] |
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| lator, Vdd = 3.3V, 55°C < T < 70°C, analog |
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| A |
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| power = off. |
DC General Purpose IO Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < TA < 70°C, or 3.0V to 3.6V and 0°C < TA < 70°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are for design guidance only.
Table 9. DC GPIO Specifications
Parameter | Description | Min | Typ | Max | Unit | Notes |
RPU | 4 | 5.6 | 8 | kΩ |
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RPD | 4 | 5.6 | 8 | kΩ |
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VOH | High Output Level | Vdd – 1.0 | – | – | V | IOH = 10 mA, Vdd = 4.75 to 5.25V (8 total loads, 4 |
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| on even port pins (for example, P0[2], P1[4]), 4 on |
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| odd port pins (for example, P0[3], P1[5])). 80 mA |
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| maximum combined IOH budget. |
VOL | Low Output Level | – | – | 0.75 | V | IOL = 25 mA, Vdd = 4.75 to 5.25V (8 total loads, 4 |
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| on even port pins (for example, P0[2], P1[4]), 4 on |
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| odd port pins (for example, P0[3], P1[5])). 150 mA |
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| maximum combined IOL budget. |
VIL | Input Low Level | – | – | 0.8 | V | Vdd = 3.0 to 5.25. |
VIH | Input High Level | 2.1 | – |
| V | Vdd = 3.0 to 5.25. |
VH | Input Hysteresis | – | 60 | – | mV |
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IIL | Input Leakage (Absolute Value) | – | 1 | – | nA | Gross tested to 1 μA. |
CIN | Capacitive Load on Pins as Input | – | 3.5 | 10 | pF | Package and pin dependent. Temp = 25°C. |
COUT | Capacitive Load on Pins as Output | – | 3.5 | 10 | pF | Package and pin dependent. Temp = 25°C. |
Note
2.Standby current includes all functions (POR, LVD, WDT, Sleep Time) needed for reliable system operation. This should be compared with devices that have similar functions enabled.
Document | Page 15 of 30 |
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