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Emerson MVME6100 manual 3 4 5 6 7

Models: MVME6100

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Board Description and Memory Maps

indicates that the switch is ON for the header position associated with that bit, and a set condition indicates that the switch is OFF.

1 2 3 4 5 6 7 8

161

CFG_0 = 0

CFG_1 = 0

CFG_2 = 0

CFG_3 = 0

CFG_4 = 0

CFG_5 = 0

CFG_6 = 0

CFG_7 = 0

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CFG_0 = 1 CFG_1 = 1 CFG_2 = 1 CFG_3 = 1 CFG_4 = 1 CFG_5 = 1 CFG_6 = 1 CFG_7 = 1

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Contents

MVME6100 Single-Board Computer Programmer’s Reference GuidePage Ground the Instrument Safety SummaryFlammability Lithium Battery CautionEMI Caution CE Notice European Community Limited and Restricted Rights Legend Contents Appendix a List of Figures List of Tables Model Number Description About This GuideComments and Suggestions Overview of ContentsBold Conventions Used in This ManualOverview IntroductionFeature Description MVME6100 Features SummaryNvram PCI/PMC MVME6100 Board Layout Diagram Processor Address Start End Size Definition Default Processor Memory MapDefault Processor Address Map Memory MapsF100 Ffff 29FF Ffff41FF Ffff F0FF FfffMOTLoad’s Processor Address Map MOTLoad’s Processor Memory MapDefault PCI Address Map Default PCI Memory MapPCI Address Start End Size Definition MOTLoad’s PCI Memory Maps MOTLoad’s PCI Memory MapsVME Memory Map System I/O Memory MapCOM 1 Uart Device Bank 1 I/O Memory MapAddress Definition M48T37V NVRAM/RTCBanksel System Status RegisterSystem Status Register RefclkSrominit AbortlFlashbsyl FusestatSystem Status Register 2- 0xF1100001 BdfailEepromwp FlashawpFbawphdr FbootbwpFbootbwphdr TstatmaskReset Board Rsvd BoardresetSystem Status Register 3- 0xF1100002 EREADY1 Presence Detect Register10. Presence Detect Register IpmcprsntPMC0PL Configuration Header/Switch Register S111. Configuration Header/Switch Register Pcieprsntl3 4 5 6 7 TBEN0 Time Base Enable RegisterQuad Universal Asynchronous Receiver/Transmitter Uart 12. Tben RegisterReal-Time Clock and Nvram 13. M48T37V AccessAddress Offset Function 0xF1110000 Programming Details MV64360 Multi-Purpose Port ConfigurationMPP Pin Input Number Output Function MV64360 MPP Pin Function AssignmentsMV64360 Reset Configuration Srom MV64360 Power-Up Configuration SettingsMV64360 Power-Up Configuration Settings PCI1 DLL DramBADR0 PCI0 DLLMII/GMII GMII/PCS Dram PLL N TBDReal-Time Clock and Nvram Flash MemoryM48T37V Access Two-Wire Serial InterfaceDevice Function Size A2A1A0 Address DDR Dram Serial Presence DetectI2C Bus Device Addressing Device AddressMV64360 Device Controller Bank Assignments VPD and User Configuration EEPROMsTemperature Sensor MV64360 InitializationDevice Bank Assignments MPC Bus and PCI Bus ArbitrationPCI Bus 0 and PCI Bus 1 Local Buses PCI Mode/Frequency SelectionIdsel Mapping for PCI Devices PCI Configuration SpaceIdsel AD20 MPP Pin Assignment PCI Masters PCI Arbitration Assignments for MV64360 AsicPCI Bus 1 Local Bus PMC Expansion Slots PCI Arbitration Assignments for MV64360PCI Bus 1 Local Bus PMC Expansion Slots PCI Bus 0 Local Bus DevicesMV64360 Interrupt Assignments MV64360 Interrupt ControllerGroup MV64360 Edge/Level Polarity Interrupt Source PCI-PMC 0 INTD#, PMC INTB# PCI-PMC 0 INTC#, PMC INTA#DS1621 Digital Thermometer and Thermostat provides MV64360 Endian IssuesTable A-1. Motorola Computer Group Documents Motorola Computer Group DocumentsDocument Title Motorola Publication Number MPC7457EC/D Manufacturers’ DocumentsTable A-2. Manufacturers’ Documents Document Title and Source Publication NumberManufacturers’ Documents Table A-2. Manufacturers’ Documents Table A-3. Related Specifications Related SpecificationsIndex