MV64360 Interrupt Controller
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GPP |
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Group |
| MV64360 | Edge/Level | Polarity | Interrupt Source |
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| GPP[18] | Level | Low |
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| 2 |
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| INTA# |
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| GPP[19] | Level | Low |
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| 2 |
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| INTB# |
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| GPP[20] | Level | Low |
| 1,5 |
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| LINT0#), PMCspan INT 2 |
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| GPP[21] | Level | Low |
| 1,5 |
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| LINT1#), PMCspan INT 3 |
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| GPP[22] | Level | Low |
| 1,5 |
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| LINT2#), PMCspan INT 0 |
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| GPP[23] | Level | Low |
| 1,5 |
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| LINT3#), PMCspan INT 1 |
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3 |
| GPP[24] |
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| Reserved for SROM |
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| initialization active InitAct |
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| output |
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| GPP[25] |
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| Reserved for Watchdog |
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| Timer WDE# output |
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| GPP[26] |
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| Reserved for Watchdog |
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| Timer WDNMI# output |
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| GPP[27] |
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| Reserved for future device |
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| interrupt |
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Notes 1. The interrupting device is addressed from the MV64360 PCI
Bus 0.
2.The interrupting device is addressed from the MV64360 PCI Bus 1.
3.The interrupting device is addressed from the MV64360 Device Bus.
http://www.motorola.com/computer/literature |