EPSON Stylus PHOTO 810/820/830

Revision B

2.2.2.5 Reset Circuit

Reset IC (IC2) on the MAIN board monitors the two voltage: +5V for the logic line and +42V for the drive line. Reset IC outputs the reset signal to CPU (IC1) in the following case.

1.When the printer power is turned on and reset IC detects 4.2V on +5V line/36.3V on +42V line, reset signal is output to perform the initialize operation correctly.

2.When the printer power is turned off and reset IC detects 4.2V on +5V line/36.3V on +42V line, reset signal is output to stop the printer operation safely.

3.When reset IC detects 4.2V on +5V line/36.3V on +42V line with fail during the printer operation, reset signal is output to stop the printer operation safely.

2.2.2.6 EEPROM Control Circuit

When the printer power is turned off, the following information is stored in EEPROM (IC3) which is nonvolatile memory. And, when the printer power is on, CPU (IC1) reads the information from EEPROM.

Information stored in EEPROM is listed below.

„Various ink counter (I/C consumption counter, waste pad counter, etc.)

„Mechanical setting value (Head ID, Bi-D adjustment, USB ID, etc.)

Refer to 7.1.2 that provides the detailed information stored in EEPROM.

Unlike the previous products, the timer IC is not built in the reset IC and the Lithium battery is not mounted on this Main board either.

.

+42V

 

 

 

 

 

 

+5V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IC2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IC1

 

 

 

BH6150F-E2

 

 

38

 

 

E01A24CA

 

 

 

 

1

 

 

 

8

 

 

 

 

 

 

 

 

 

NC1

MEWS

MRES

 

2

7

 

 

IN

VCC

 

 

 

 

 

 

 

 

37

 

 

 

 

3

NC2

OUT1 6

NMI

 

4

GND

OUT2 5

36

RESET

 

 

 

+5V EEPROM-93C (IC3)

 

8

 

 

 

 

1

42

 

 

 

VCC

CS

 

 

 

7

 

NC

SK

2

41

 

 

6

 

ORG

DI

3

40

 

 

5

 

GND

DO

4

39

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E01A24CA

(IC1)

C-P20

C-P21

C-P22

C-P23

Figure 2-22. Reset circuit block diagram

Main line for reset IC has the following function.

„

OUT1:

Interrupt signal

„

OUT2:

Reset line

„

IN:

+42V line monitoring line

„

VCC:

+5V line monitoring line

Figure 2-23. EEPROM circuit diagram

EEPROM is connected to CPU with 4 lines and each line has the following function.

„

CS:

Chip selection signal

„

CK:

Data synchronism clock pulse

„

DI:

Data writing line (serial data) at power off.

„

DO:

Data reading line (serial data) at power on.

Operating Principles

Electrical Circuit Operating Principles

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