AN50 APPLICATION NOTE
16
PCB Layout Guidelines
• Placement of the MOSFETs relative to the RC5050 is
critical. Place the MOSFETs (M1 & M2) so that the trace
length of the HIDRV pin from the RC5050 to the FET
gates is minimized. A long lead length on this pin would
cause high amounts of ringing due to the inductance of the
trace and the large gate capacitance of the FET. This noise
radiates all throughout the board, and, because it is
switching at such a high voltage and frequency, it is very
difficult to suppress.
Figure 15 shows an example of good placement for the
MOSFETs in relation to the RC5050. In addition, this fig-
ure shows an example of problematic placement for the
MOSFETs.
Refer to Appendix A for Directory of component suppliers.
Notes:
1. When used in synchronous mode, a 1A schottky diode such as the 1N5817 should be substituted for the MBR2015CT.
2. A target RDS,ON value of 10mΩ should be used for each output driver switch. Refer to Table 3 for alternative MOSFETs.
1 L1 Pulse Engineering
PE-53680 1.3µH inductor
1 L2* Pulse Engineering
PE-53681 2.5µH inductor *Optional—helps
reduce ripple on 5v line
2-4
(note 2) M1-M4 International Rectifier
IRF7413 N-Channel Logic Level
Enhancement Mode MOSFET RDS,ON < 18mΩ
VGS = 4.5V, ID = 5A
1 Rsense Coppel
CuNi Wire resistor 6 mΩ, 1W
1 R5 Panasonic
ERJ-6GEY050Y 47Ω 5% resistors
1 R6 Panasonic
ERJ-6ENF10.0KY 10KΩ 5% resistor
U1 Raytheon
RC5050M or RC5051M Programmable DC-DC
converter
Table 11. Bill of Materials for a 13A Pentium Pro Klamath Application (continued)
Quantity Reference Manufacturer Part
Order # Description Requirements and
Comments
Good layout
8
7
6
2
11
15
14
13
12
3
16
1
5
4
Bad layout
RC5050
“Quiet" Pins=
9
10
17
18
19
20
8
7
6
2
11
15
14
13
12
3
16
1
5
4
9
10
17
18
19
20
RC5050
M1
M2
M1
M2
Figure 15. Placement of the MOSFETs