Fujitsu MHV2040AS, MHV2080AS, MHV2060AS manual Normal DMA data transfer

Models: MHV2060AS MHV2080AS MHV2040AS

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Interface

f)When the command execution is completed, the device clears both BSY and DRQ bits and asserts the INTRQ signal. Then, the host reads the Status register.

g)The host resets the DMA channel.

Figure 5.7 shows the correct DMA data transfer protocol.

f

g

d

d

f

e

Figure 5.7 Normal DMA data transfer

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Fujitsu MHV2040AS, MHV2080AS, MHV2060AS manual Normal DMA data transfer