5.5 Ultra DMA Feature Set

13)The host shall neither negate STOP nor HSTROBE until at least tACK after negating DMACK-.

14)The host shall not assert DIOW-, CS0-, CS1-, DA2, DA1, or DA0 until at least tACK after negating DMACK.

5.5.5Ultra DMA CRC rules

The following is a list of rules for calculating CRC, determining if a CRC error has occurred during an Ultra DMA burst, and reporting any error that occurs at the end of a command.

a)Both the host and the device shall have a 16-bit CRC calculation function.

b)Both the host and the device shall calculate a CRC value for each Ultra DMA burst.

c)The CRC function in the host and the device shall be initialized with a seed of 4ABAh at the beginning of an Ultra DMA burst before any data is transferred.

d)For each STROBE transition used for data transfer, both the host and the device shall calculate a new CRC value by applying the CRC polynomial to the current value of their individual CRC functions and the word being transferred. CRC is not calculated for the return of STROBE to the asserted state after the Ultra DMA burst termination request has been acknowledged.

e)At the end of any Ultra DMA burst the host shall send the results of its CRC calculation function to the device on DD (15:0) with the negation of DMACK-.

f)The device shall then compare the CRC data from the host with the calculated value in its own CRC calculation function. If the two values do not match, the device shall save the error and report it at the end of the command. A subsequent Ultra DMA burst for the same command that does not have a CRC error shall not clear an error saved from a previous Ultra DMa burst in the same command. If a miscompare error occurs during one or more Ultra DMA bursts for any one command, at the end of the command, the device shall report the first error that occurred.

g)For READ DMA or WRITE DMA commands: When a CRC error is detected, it shall be reported by setting both ICRC and ABRT (bit 7 and bit 2 in the Error register) to one. ICRC is defined as the "Interface CRC Error" bit. The host shall respond to this error by re-issuing the command.

h)A host may send extra data words on the last Ultra DMA burst of a data out command. If a device determines that all data has been transferred for a command, the device shall terminate the burst. A device may have already received more data words than were required for the command. These extra words are used by both the host and the device to calculate the CRC, but, on an Ultra DMA data out burst, the extra words shall be discarded by the device.

C141-E221

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Fujitsu MHV2060AS, MHV2080AS, MHV2040AS manual Ultra DMA CRC rules
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MHV2060AS, MHV2080AS, MHV2040AS specifications

Fujitsu's MHV series of hard disk drives, specifically the MHV2040AS, MHV2080AS, and MHV2060AS models, are designed to deliver efficient performance and reliability for a range of applications, particularly in desktop computing and entry-level servers. Each of these drives adheres to the Serial ATA (SATA) interface, which ensures compatibility across a wide range of systems and is known for its cost-effectiveness and simplicity.

The MHV2040AS features a storage capacity of 40GB, making it suitable for basic computing tasks including document editing, web browsing, and media playback. The MHV2060AS steps it up with a 60GB capacity, allowing for increased data storage needs while still maintaining a high level of performance. The largest of the trio, the MHV2080AS, offers an impressive 80GB of space, positioning it well for users who require additional room for applications, games, and multimedia files.

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