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Fujitsu MHV2060AS, MHV2080AS, MHV2040AS manual Ultra DMA Feature Set

Models: MHV2060AS MHV2080AS MHV2040AS

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5.5 Ultra DMA Feature Set

6)The host shall drive DD (15:0) no sooner than tZAH after the device has negated DMARQ. For this step, the host may first drive DD (15:0) with the result of its CRC calculation (see 5.5.5):

7)If DSTROBE is negated, the device shall assert DSTROBE within tLI after the host has asserted STOP. No data shall be transferred during this assertion. The host shall ignore this transition on DSTROBE. DSTROBE shall remain asserted until the Ultra DMA burst is terminated.

8)If the host has not placed the result of its CRC calculation on DD (15:0) since first driving DD (15:0) during (6), the host shall place the result of its CRC calculation on DD (15:0) (see 5.5.5).

9)The host shall negate DMACK- no sooner than tMLI after the device has asserted DSTROBE and negated DMARQ and the host has asserted

STOP and negated HDMARDY-, and no sooner than tDVS after the host places the result of its CRC calculation on DD (15:0).

10)The device shall latch the host's CRC data from DD (15:0) on the negating edge of DMACK-.

11)The device shall compare the CRC data received from the host with the results of its own CRC calculation. If a miscompare error occurs during one or more Ultra DMA bursts for any one command, at the end of the command the device shall report the first error that occurred (see 5.5.5).

12)The device shall release DSTROBE within tIORDYZ after the host negates DMACK-.

13)The host shall not negate STOP no assert HDMARDY- until at least tACK after negating DMACK-.

14)The host shall not assert DIOR-, CS0-, CS1-, DA2, DA1, or DA0 until at least tACK after negating DMACK.

b)Host terminating an Ultra DMA data in burst

The following steps shall occur in the order they are listed unless otherwise specifically allowed (see 5.6.3.6 and 5.6.3.2 for specific timing requirements):

1)The host shall not initiate Ultra DMA burst termination until at least one data word of an Ultra DMA burst has been transferred.

2)The host shall initiate Ultra DMA burst termination by negating HDMARDY-. The host shall continue to negate HDMARDY- until the Ultra DMA burst is terminated.

3)The device shall stop generating DSTROBE edges within tRFS of the host negating HDMARDY-.

C141-E221

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Fujitsu MHV2060AS, MHV2080AS, MHV2040AS manual Ultra DMA Feature Set

Contents

Disk Drive Product Manual MHV2080AS, MHV2060AS, MHV2040ASHandling of This Manual For Safe OperationRevision History This page is intentionally left blank Overview of Manual PrefaceOperating Environment Conventions for Alert MessagesConventions Liability Exception This page is intentionally left blank Important Alert Messages Important Alert ItemsDamage Interface cable connection This page is intentionally left blank Manual Organization Disk Drive Maintenance ManualMHV2080AS Disk Drive Product ManualThis page is intentionally left blank Contents Theory of Device Operation Installation ConditionsInterface Contents101 Write Multiple EXT X’39’ Option customizing Operations Glossary GL-1 Acronyms and Abbreviations AB-1 Index IN-1 Figures IllustrationsExecution example of Read Multiple command Examples of model names and product numbers Tables127 This page is intentionally left blank Device Overview Functions and performance FeaturesAdaptability High resistance against shock Error correction and retry by ECCConnection to ATA interface Data bufferSpecifications summary Device SpecificationsSpecifications 1 MHV2080AS MHV2060AS MHV2040ASExamples of model names and product numbers Model and product numberInput Voltage Power RequirementsRipple Current and power dissipation Current Requirements and Power DissipationCurrent fluctuation Typ. at +5 V when power is turned on Environmental SpecificationsPower on/off sequence Environmental specificationsShock and vibration specification Acoustic noise specificationAcoustic Noise Shock and VibrationData assurance in the event of power failure Service lifeReliability Mean time between failures MtbfUnrecoverable read error Error RatePositioning error Media DefectsAdvanced Power Management Advanced Power Management This page is intentionally left blank Device Configuration Device Configuration ATA interface System Configuration2 1 drive connection Read/write circuit3 2 drives connection 2 drives configurationInstallation Conditions Dimensions DimensionsIntegration Guidance C141-E144 MountingOrientation Limitation of mounting FramePCA Location of breather Ambient temperature Handling cautions Service areaHandling cautions Cable Connections Device connectorCable connector specifications Cable connector specificationsDevice connection FCIPower supply connector CN1 Jumper SettingsLocation of setting jumpers Master drive-slave drive setting Factory default setting14 Csel setting Csel setting16 Example 2 of cable select Power up in standby settingTheory of Device Operation Subassemblies OutlineDisk SpindleAir filter Circuit ConfigurationServo circuit Spindle motor driver circuitPower supply configuration PCA Power-on operation sequence Power-on SequenceSelf-calibration Self-calibration contentsExecution timing of self-calibration Command processing during self-calibrationRead/write preamplifier PreAMP Read/write CircuitWrite circuit Write precompensationAGC circuit Read circuitProgrammable filter circuit FIR circuit Digital PLL circuitD converter circuit Viterbi detection circuitServo control circuit Servo ControlMicroprocessor unit MPU Power amplifierServo burst capture circuit A converter DACVCM current sense resistor CSR Driver circuitInner guard band Data-surface servo formatData area Outer guard bandPhysical sector servo configuration on disk surface Servo frame format Operation to move the head to the reference cylinder Actuator motor controlSeek operation Track following operationAcceleration mode Start modeStable rotation mode Spindle motor controlThis page is intentionally left blank Interface Physical Interface Interface signalsSignal assignment on the interface connector Signal assignment on the connectorDA1 PDIAG-, Cblid DA0 DA2 Dasp GNDDiow MstrStop DiorCblid PdiagDasp IordyDmarq Logical InterfaceI/O registers 1 I/O registersDA2 DA1 DA0 Error register X’1F1’ Command block registersData register X’1F0’ UNC IdnfSector Count register X’1F2’ Features register X’1F1’Cylinder Low register X’1F4’ Sector Number register X’1F3’Cylinder High register X’1F5’ DEV HS3 HS2 HS1 HS0 Device/Head register X’1F6’Status register X’1F7’ BSYInterface Control block registers Command register X’1F7’Alternate Status register X’3F6’ Command code and parameters Host CommandsDevice Control register X’3F6’ HOB SrstCommand Name Command code and parameters 1Parameter Used EXT Write Multiple FUA EXT Flush Cache EXT Command code and parameters 2Host Commands Command descriptions Host Commands Recalibrate X’10’ to X’1F’ MSB Read Sectors X’20’ or X’21’End head No. / LBA MSB Write Sectors X’30’ or X’31’ 1F7HST Status information 1F6HDH MSB Write Verify X’3C’Read Verify Sectors X’40’ or X’41’ Seek X’70’ to X’7F’ Diagnostic code Execute Device Diagnostic X’90’Device responds to this command with the result of power-on Initialize Device Parameters X’91’ Download Microcode X’92’ Operation of Download Microcode Standby Immediate X’94’ or X’E0’ Unload Feature Unload Immediate Command Host Commands Standby X’96’ or X’E2’ Idle X’97’ or X’E3’ Interface ’FF’ Check Power Mode X’98’ or X’E5’Sleep X’99’ or X’E6’ Smart X’B0 Features register values subcommands and functions 1 Smart Enable Operations Features register values subcommands and functions 2Smart Disable Operations Smart Read LOG’DB’ Smart ENABLE/DISABLE Auto OFF-LINE Features register values subcommands and functions 3Smart Return Status Host Commands 1FF Format of device attribute value dataFormat of insurance failure threshold value data Attribute ID Data format version numberCurrent attribute value Status FlagAttribute value for the worst case so far Raw attribute valueSelf-test execution status 10 Off-line data collection status11 Self-test execution status 12 Off-line data collection capability Off-line data collection capabilityFailure prediction capability flag 13 Failure prediction capability flag14 Error logging capability Error logging capabilityCheck sum Insurance failure thresholdSmart error logging 16 Data format of Smart Summary Error Log Error data structure Command data structureTotal number of drive errors 17 Data format of Smart Comprehensive Error Log18 Smart self-test log data format Smart self-test1FC Self-test numberTest span 19 Selective self-test log data structureCurrent LBA under test Current span under test20 Selective self-test feature flags Feature FlagsSelective Self-test pending time min Device Configuration Restore Device Configuration XB1Device Configuration Freeze Device Configuration IdentifyDevice Configuration Freeze Lock FR = C1h Device Configuration Restore FR = C0hDevice Configuration Identify FR = C2h Device Configuration SET FR = C3hInterface 21 Device Configuration Identify data structure 1/2 21 Device Configuration Identify data structure 2/2 Read Multiple X’C4’ Execution example of Read Multiple commandMSB Write Multiple X’C5’ Interface SET Multiple Mode X’C6’ Interface MSB Read DMA X’C8’ or X’C9’End head No. / LBA MSB Write DMA X’CA’ or X’CB’ Interface Read Buffer X’E4’ Flush Cache X’E7’ Write Buffer X’E8’ Identify Device X’EC’ Identify Device DMA X’EE’ ’3FFF’ 22 Information to be read by Identify Device command 122 Information to be read by Identify Device command 2 3FFF Command without interrupt supports 2, 4, 8 and 16 sectors = Supports the Host Protected Area feature set = Supports the CFA Compact Flash Association feature set Interface Write Stream EXT Interface Host Commands Word Bit Reserved Security level High, 1 Maximum 23 Features register values and settable modes SET Features X’EF’’BB’ ’CC’Data Transfer Mode Advanced Power Management APM Automatic Acoustic Management AAM 24 Contents of Security SET Password data Interface When the user password is selected When the master password is selectedSecurity UNLOCKX’F2’ Interface Security Erase Prepare X’F3’ Security Erase Unit X’F4’ Security Freeze Lock X’F5’ Interface 26 Contents of security password Interface Read Native MAX Address X’F8’ SET MAX Address SET MAX X’F9’SET MAX SET Password FR = 01h SET MAX Lock FR = 02h SET MAX Unlock FR = 03h SET MAX Freeze Lock FR = 04h Host Commands Read Sectors EXT X’24’ Option customizing Description Read DMA EXT X’25’ Option customizing Description Error reporting conditions Read Multiple EXT X’29’ Option customizing Description Read LOG EXT X2F Optional command Customize Description Host Commands Write Sectors EXT X’34’ Option customizing Description Write DMA EXT X’35’ Option customizing Description SET MAX Address EXT X’37’ Option customizing Description Error reporting conditionsSET MAX LBA Write Multiple EXT X’39’ Option customizing Description Write DMA FUA EXT X’3D’ Option customizing Description Write LOG EXT X’3F’ Optional command Customize Description Host Commands Read Verify Sectors EXT X’42 Option customizing Description Write Multiple FUA EXT X’CE’ Option customizing Description Flush Cache EXT X’EA’ Option customizing Description Error reporting conditions27 Command code and parameters 1 Error posting27 Command code and parameters 2 PIO Data transferring commands from device to host Command ProtocolExecute Device Diagnostic Initialize Device Parameters Read Sectors Command protocol Protocol for command abort PIO Data transferring commands from host to device Write Sectors command protocol Commands without data transfer DMA data transfer commands Other commandsRead Multiple EXT Write Multiple EXT/FUA EXT Sleep Read DMA EXT Write DMA EXT/FUA EXT Indentify Device DMANormal DMA data transfer Overview Ultra DMA Feature SetUltra DMA data in commands Phases of operationInitiating an Ultra DMA data in burst Data in transfer Pausing an Ultra DMA data in burstDmarq Terminating an Ultra DMA data in burstUltra DMA Feature Set Interface Initiating an Ultra DMA data out burst Ultra DMA data out commandsData out transfer Pausing an Ultra DMA data out burstTerminating an Ultra DMA data out burst Interface Ultra DMA CRC rules 28 Recommended series termination for Ultra DMA Series termination required for Ultra DMADIOR-HDMARDY-HSTROBE DIOW-STOPPIO data transfer TimingPIO data transfer timing Multiword data transfer 10 Multiword DMA data transfer timing mode11 Initiating an Ultra DMA data in burst Ultra DMA data transferStrobe Name Mode CommentMIN MAX 29 Ultra DMA data burst timing requirements 230 Ultra DMA sender and recipient timing requirements Mode Name CommentDstrobe at device Sustained Ultra DMA data in burstDD150 at device Dstrobe at host DD150 at hostDmarq Host pausing an Ultra DMA data in burstDmack HdmardyStop Device terminating an Ultra DMA data in burstHost Host terminating an Ultra DMA data in burstDA0, DA1, DA2 CS0, CS1 16 Initiating an Ultra DMA data out burst Hstrobe at host DD150 at host Sustained Ultra DMA data out burstHstrobe at device DD150 at device Device DMACK- host Stop host DDMARDY- device Device pausing an Ultra DMA data out burstHstrobe host DD150 Host 19 Host terminating an Ultra DMA data out burst Host terminating an Ultra DMA data out burstDmarq device DMACK- host Device terminating an Ultra DMA data out burstDD150 Host Master and slave devices are present 2-drives configuration Power-on and resetOnly master device is present Operations Response to power-on Device Response to the ResetResponse to power-on Response to hardware resetResponse to hardware reset Response to software reset Response to software resetResponse to diagnostic command Response to diagnostic commandPower save mode Power SaveActive mode Active idle modeSleep mode Standby modeDefect Processing Power commandsSpare area Sector slip processing Alternating processing for defective sectorsTrack slip processing Automatic alternating processing Automatic alternating processingData buffer structure Read-ahead Cache8MB buffer 8,388,608 bytes Caching operation Commands that are targets of cachingData that is a target of caching Invalidating caching-target dataSmart Miss-hit Using the read segment bufferSequential hit Full hit Partial hit Write Cache Command that are targets of cachingCache operation Invalidation of cached dataReset response Status report in the event of an errorCaching function when power supply is turned on Enabling and disablingWrite Cache This page is intentionally left blank Glossary Rotational delay Power save modePIO Programmed input-output PositioningVCM StatusThis page is intentionally left blank Acronyms and Abbreviations This page is intentionally left blank AAM IndexIndex Host pausing ultra DMA data Read Native MAX Address Read Sectors CommandSurface temperature measurement This page is intentionally left blank Japan Comment FormThis page is intentionally left blank C141-E221-02EN This page is intentionally left blank