Interface

Both the host and device perform a CRC function during an Ultra DMA burst. At the end of an Ultra DMA burst the host sends the its CRC data to the device. The device compares its CRC data to the data sent from the host. If the two values do not match the device reports an error in the error register at the end of the command. If an error occurs during one or more Ultra DMA bursts for any one command, at the end of the command, the device shall report the first error that occurred.

5.5.2 Phases of operation

An Ultra DMA data transfer is accomplished through a series of Ultra DMA data in or data out bursts. Each Ultra DMA burst has three mandatory phases of operation: the initiation phase, the data transfer phase, and the Ultra DMA burst termination phase. In addition, an Ultra DMA burst may be paused during the data transfer phase (see 5.5.3 and 5.5.4 for the detailed protocol descriptions for each of these phases, 5.6 defines the specific timing requirements). In the following rules DMARDY- is used in cases that could apply to either DDMARDY- or HDMARDY-, and STROBE is used in cases that could apply to either DSTROBE or HSTROBE. The following are general Ultra DMA rules.

a)An Ultra DMA burst is defined as the period from an assertion of DMACK- by the host to the subsequent negation of DMACK-.

b)A recipient shall be prepared to receive at least two data words whenever it enters or resumes an Ultra DMA burst.

5.5.3 Ultra DMA data in commands

5.5.3.1 Initiating an Ultra DMA data in burst

The following steps shall occur in the order they are listed unless otherwise specifically allowed (see 5.6.3.1 and 5.6.3.2 for specific timing requirements):

1)The host shall keep DMACK- in the negated state before an Ultra DMA burst is initiated.

2)The device shall assert DMARQ to initiate an Ultra DMA burst. After assertion of DMARQ the device shall not negate DMARQ until after the first negation of DSTROBE.

3)Steps (3), (4) and (5) may occur in any order or at the same time. The host shall assert STOP.

4)The host shall negate HDMARDY-.

5)The host shall negate CS0-, CS1-, DA2, DA1, and DA0. The host shall keep CS0-, CS1-, DA2, DA1, and DA0 negated until after negating DMACK- at the end of the burst.

6)Steps (3), (4) and (5) shall have occurred at least tACK before the host asserts DMACK-. The host shall keep DMACK- asserted until the end of an Ultra DMA burst.

5-138

C141-E221

Page 213 Page 215
Page 214
Image 214
Fujitsu MHV2060AS, MHV2080AS manual Phases of operation, Ultra DMA data in commands, Initiating an Ultra DMA data in burst
Page 213 Page 215

MHV2060AS, MHV2080AS, MHV2040AS specifications

Fujitsu's MHV series of hard disk drives, specifically the MHV2040AS, MHV2080AS, and MHV2060AS models, are designed to deliver efficient performance and reliability for a range of applications, particularly in desktop computing and entry-level servers. Each of these drives adheres to the Serial ATA (SATA) interface, which ensures compatibility across a wide range of systems and is known for its cost-effectiveness and simplicity.

The MHV2040AS features a storage capacity of 40GB, making it suitable for basic computing tasks including document editing, web browsing, and media playback. The MHV2060AS steps it up with a 60GB capacity, allowing for increased data storage needs while still maintaining a high level of performance. The largest of the trio, the MHV2080AS, offers an impressive 80GB of space, positioning it well for users who require additional room for applications, games, and multimedia files.

All drives in this series are equipped with a rotational speed of 5400 RPM, which strikes a balance between speed and power consumption. This speed is adequate for everyday tasks and allows for quick boot times and file access, making them ideal for home and small office environments. Additionally, the drives feature an average latency of 5.5 milliseconds, contributing to their overall performance in retrieving data.

In terms of technology, the MHV series employs a fluid dynamic bearing (FDB) motor, which not only enhances reliability but also reduces noise levels during operation. The FDB technology helps improve the longevity of the drives by minimizing wear on mechanical components. This characteristic is particularly important for users seeking quieter drives, especially in work environments that require minimal disruption.

The drives also incorporate advanced power management features that significantly reduce power consumption, making them an environmentally friendly choice for users mindful of their carbon footprint. These drives are equipped with energy-saving modes that optimize their performance when not in full use, ensuring lower operational costs and longer lifespan.

Overall, the Fujitsu MHV2040AS, MHV2080AS, and MHV2060AS hard drives provide a solid solution for users looking for dependable storage with a range of capacities to fit their needs. Their performance, combined with noise reduction technologies and energy efficiency, makes them a notable choice for various computing environments, from single-user desktops to small business applications.
Top Page Image Contents