2System Board Chipset

Chipset

The Intel® I850 chipset is a high-integration chipset designed for MCH graphics/multimedia PC platforms and is comprised of the following:

•The 82850 Memory Controller Hub (MCH) is a bridge between: the Sys- tem bus, Dual Rambus bus (main memory), AGP 4x (graphic) bus and

Hub Link 8-bit. The MCH chip feature is described in detail on page 35.

ICH2

• The 82801BA Input/Output Controller Hub2 (ICH2) is a bridge between the following buses: the PCI bus (32-bits/33 MHz) and SMBus. In addi- tion,

the ICH2 supports the integrated IDE controller (Ultra ATA/100), Enhanced DMA controller, USB controller, Interrupt controller, Low Pin Count (LPC) interface, FWH interface, ACPI Power Management Logic, AC’97 2.1 Compliant Link, AOL (Alert-On-LAN) and Real Time Clock (RTC) and CMOS. The ICH2 is described in detail on page 42.

•The 82802AB Firmware Hub (FWH) stores system BIOS and SCSI BIOS, nonvolatile memory component. In addition, the FWH contains an Intel® Random Number Generator (RNG). The RNG provides random numbers to enable fundamental security building blocks for stronger encryption, digital signing and security protocols for the PC Workstation. The FWH is described in detail on page 54.

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