HP XU700 manual System Bus

2System Board System Bus

System Bus

The system bus of the Pentium 4 processor is implemented in the GTL (Gunning Transceiver Logic)+ technology. This technology features open- drain signal drivers that are pulled up through resistors at bus extremities to the operating voltage of the processor core. These resistors also act as bus terminators, and are integrated in the processor and in the 82850 MCH.

		Socket 423			Intel Pentium 4
					Processor
Address (32)
								100 MHz two-way System Bus
Control
								(Data Bus runs at 4 x 100 MHz,
Data (64)								3.2 GB/s transfer rate)
			AGP 4x Bus
	1.5V		(133 MHz (1 GB/sec	850
	AGP		data transfer rate)		Memory	Dual Rambus Channel	4 onboard RIMM sockets
					Controller Hub		supporting RDRAM memory.
	PRO					3.2 GB/s at 400 MHz-
					(MCH)
	Connector
				82850		data transfer rate)

HUB LINK 8 (266 MB/s data transfer rate)

I/O Controller Hub

(ICH) 82801AA

The supported operating frequency of the GTL+ bus for the Pentium 4 is 100 MHz. The width of the data bus is 64 bits, while the width of the address is 32 bits. Data bus transfers occur at four times the system bus, at 400 MHz. Along with the operating frequencies, the processor voltage is set automatically.

The control signals of the system bus allow the implementation of a “split - transaction” bus protocol. This allows the Pentium 4 processor to send its request (for example, for the contents of a given memory address) and then to release the bus, rather than waiting for the result, thereby allowing it to

56