Datasheet 31
Power Management
4.1.3 Integrated Memory Controller (IMC) States4.1.4 Direct Media Interface Gen 2 (DMI2) / PCI Express* Link States
Note: L1 is only supported when the DMI2/PCI Express* port is operating as a PCI Express* port.

Table 4-4. System Memory Power States

State Description
Power Up/Normal Operation CKE asserted. Active Mode, highest power consumption.
CKE Power Down
Opportunistic, per rank control after idle time:
• Active Power Down (APD) (default mode)
— CKE de-asserted. Power savings in this mode, relative to active idle
state is about 55% of the memory power. Exiting this mode takes
3 – 5 DCLK cycles.
• Pre-charge Power Down Fast Exit (PPDF)
— CKE de-asserted. DLL-On. Also known as Fast CKE. Power savings in
this mode, relative to active idle state is about 60% of the memory
power. Exiting this mode takes 3 – 5 DCLK cycles.
• Pre-charge Power Down Slow Exit (PPDS)
— CKE de-asserted. DLL-Off. Also known as Slow CKE. Power savings in
this mode, relative to active idle state is about 87% of the memory
power. Exiting this mode takes 3 – 5 DCLK cycles until the first
command is allowed and 16 cycles until first data is allowed.
• Register CKE Power Down:
— IBT-ON mode: Both CKEs are de-asserted, the Input Buffer
Terminators (IBTs) are left “on”.
— IBT-OFF mode: Both CKEs are de-asserted, the Input Buffer
Terminators (IBTs) are turned “off”.
Self-Refresh
CKE de-asserted. In this mode, no transactions are executed and the system
memory consumes the minimum possible power. Self-refresh modes apply to
all memory channels for the processor.
• IO-MDLL Off: Option that sets the IO master DLL off when self-refresh
occurs.
• PLL Off: Option that sets the PLL off when self-refresh occurs.

Table 4-5. DMI2 / PCI Express* Link States

State Description
L0 Full on – Active transfer state.
L1 Lowest Active State Power Management (ASPM) – Longer exit latency.