Datasheet 51
Electrical Specifications
7Electrical Specifications
This chapter covers the following topics:
• Processor Signaling
• Signal Group Summary
• Power-On Configuration (POC) Options
• Absolute Maximum and Minimum Ratings
• DC Specifications
7.1 Processor Signaling
The processor includes 2011 lands that use various signaling technologies. Signals are
grouped by electrical characteristics and buffer type into various signal groups. These
include DDR3 (Reference Clock, Command, Control, and Data), PCI Express*, DMI2,
Platform Environmental Control Interface (PECI), System Reference Clock, SMBus,
JTAG and Test Access Port (TAP), SVID Interface, Processor Asynchronous Sideband,
Miscellaneous, and Power/Other signals. Refer to Table 7-5 for details.
7.1.1 System Memory Interface Signal Groups
The system memory interface uses DDR3 technology that consists of numerous signal
groups. These include Reference Clocks, Command Signals, Control Signals, and Data
Signals. Each group consists of numerous signals that may use various signaling
technologies. Refer to Table 7-5 for further details. Throughout this chapter the system
memory interface may be referred to as DDR3.
7.1.2 PCI Express* Signals
The PCI Express Signal Group consists of PCI Express* ports 1, 2, and 3, and PCI
Express miscellaneous signals. Refer to Table 7-5 for further details.
7.1.3 Direct Media Interface Gen 2 (DMI2) / PCI Express*
Signals
The Direct Media Interface Gen 2 (DMI2) sends and receives packets and/or commands
to the PCH. The DMI2 is an extension of the standard PCI Express Specification. The
DMI2/PCI Express Signals consist of DMI2 receive and transmit input/output signals
and a control signal to select DMI2 or PCIe* 2.0 operation for port 0. Refer to Table 7-5
for further details.