MiTAC 8355 service manual System Flash Memory Bios, Memory System

8355 N/B MAINTENANCE

1.2.9 System Flash Memory (BIOS)

2 M bit Flash memory

Flashed by 5V only

User can upgrade the system BIOS in the future just running flash program.

1.2.10 Memory System

64MB, 128MB, 256MB, 512MB (x64) 200-Pin DDR SDRAM SODIMMs

JEDEC-standard 200-pin, small-outline, dual in-line memory module (SODIMM)

Utilizes 200 Mb/s and 266 Mb/s DDR SDRAM components

64MB (8 Meg x 64 [H]); 128MB (16 Meg x 64, [H] and [HD]); 256MB (32 Meg x 64 [HD]); 512MB (64 Meg x 64 [HD])

VDD= VDDQ= +2.5V ±0.2V

VDDSPD = +2.2V to +5.5V

2.5V I/O (SSTL_2 compatible)

Commands entered on each positive CK edge

DQS edge-aligned with data for READs; center-aligned with data for WRITEs

Internal, pipelined double data rate (DDR) architecture; two data accesses per clock cycle Bidirectional data strobe (DQS) transmitted/received with data—i.e.,source-synchronous data capture Differential clock inputs (CK and CK# - can be multiple clocks, CK0/CK0#, CK1/CK1#, etc.)

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