MiTAC 8355 VT8235 South Bridge-1, Advanced Programmable Interrupt Controller APICInterface

8355 N/B MAINTENANCE

5.3 VT8235 South Bridge-1

V-Link Interface

Signal Name	Pin #	I/O	Signal Description
VAD[15:0]	K22,J22,G24,H22,	IO	Address /Data Bus. Bits 0-7 are implemented and bits
	G22,G23,F23,D25,		8-15 are reserved for future use. VAD[6:0]are used to
	K26,K24,E24,E26,		send strap information o he chipset north bridge. A
	J25,J26,F26,F25		power up VAD[6:4]reflect he state of straps on pins
			SDA[2:0] and VAD[3:0]reflect the state of straps on pins
			SA[19:16].The specific interpretation of these straps is
			north bridge chip design dependent.
VPAR	D26	IO	Parity. If the VPAR function is implemented in a
			compatible manner on the north bridge, this pin should
			be connected to the north bridge VPAR pin (P4X333,
			P4X400, P4X800,KT400).If VPAR is not implemented
			in the north bridge chip or is incompatible with he 8235
			(4x V-Link north bridges) connect this pin to an 8.2K
			pull up to 2.5V (Pro266,Pro266T,KT266, KT266A,
			KT333, P4X266, PN266,KN266,KM266, P4M266,
			P4N266).See app note AN222 for details.
VBE[1:0]#	L26,F24	IO	Byte Enables.VBE0#is used with VAD[7-0]and VBE1#
			is used with VAD[15-8](VBE1#and VAD[15-8]are
			reserved for future use).
VCLK	L24	I	V-Link Clock.
UPCMD	K25	O	Command from Client-to-Host.
DNCMD	J24	I	Command from Host-to-Client.
UPSTB	H24	O	Strobe from Client-to-Host.
UPSTB#	H26	O	Complement Strobe from Client-to-Host.
DNSTB	G25	I	Strobe from Host-to-Client.
DNSTB#	G26	I	Complement Strobe from Host-to-Client.
VLVREF	J23	I	Voltage Reference.
VLCOMP	K23	I	V-Link Compensation.
VCCVK	(see pin list)	P	V-Link VK Power.

Advanced Programmable Interrupt Controller (APIC)Interface

Signal Name	Pin #	I/O	Signal Description
APICD1	V23	O	Internal APIC Data 1.Function 0 Rx58[6]=1
APICD0	T22	O	Internal APIC Data 0.Function 0 Rx58[6]=1
APICCLK	U23	I	APIC Clock.

Straps

Signal Name	Pin #	I/O	Signal Description
Strap /SDCS3#	AD23	I	Strap. State reflected on VAD[7]at powerup. No internal
			function.
Strap /SDA2	AF23	I	Strap. State reflected on VAD[6]at powerup. No internal
			function.
Strap /SDA1	AC22	I	Strap. State reflected on VAD[5]at powerup. No internal
			function.
Strap /SDA0	AE23	I	Strap. State reflected on VAD[4]at powerup. No internal
			function.
Strap /SA19	AC11	I	Strap. State reflected on VAD[3]at powerup. No internal
			function.
Strap /SA18	AD11	I	Strap. State reflected on VAD[2]at powerup. No internal
			function.
Strap /SA17	AE11	I	Strap. State reflected on VAD[1]at powerup. No internal
			function.
Strap /SA16	AF11	I	Strap. State reflected on VAD[0]at powerup. No internal
			function.
Strap /SOE#	AD12	I	Strap. Strap low o enable (high o disable)auto reboot.
Strap /SPKR	AE9	I	Strap. Strap low o enable (high o disable)CPU frequency s
			rapping
Strap	AF12	I	Strap. Strap high to enable LPCBIOSROM
/ROMCS#/KBCS#

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