Motorola M68HC08 manual Mutual Capacitance Model

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

BLDC Motor Control

		Id0		A	iC	uCac
	+
/2		SAt	SBt	RC	C		C
	=
ud						R
	-			uVA	iCab		C
							iC	uVC Cap
	+			uCba
ud/2	=	SAb	SBb	C		C
				ISb	RC		uCcb
	-			B

uVB

Figure 3-9. Mutual Capacitance Model

Let us focus on the situation when the motor phase A is switched from negative dc-bus rail to positive, and the phase B is switched from positive to negative. This is described by these conditions (EQ 3-8.):

SAb, SBt ← PWM

u

1

1

, u

1

1

(EQ 3-8.)

VA

= –--u

d

→ --u

VB

= --u

d

→ –--u

d

2

2 d

2

2

iCac = iCcb = iC

The voltage that disturbs the back-EMF sensing, utilizing the free (not powered) motor phase C, can be calculated based the equation:

u

=

1

(u

+ u

+ 2R

) – (u

+ R

)

1

(u

– u

)

(EQ 3-9.)

VC Cap

--

Ccb

Cac

C

Ccb

C

= --

Cac

Ccb

2

2

The final expression for disturbing voltage can be found as follows:

uVC Cap =	1		1	1		∫iC dt =	1	 Ccb – Cac	∫iC dt	(EQ 3-10.)
	--		-------	– -------			--	 ----------------------
	2		Cac	Ccb			2	Ccb ⋅ Cac

NOTE: (EQ 3-10.)expresses the fact that only the unbalance of the mutual capacitance (not the capacitance itself) disturbs the back-EMF sensing. When both capacities are equal (they are balanced), the disturbances disappear. This is demonstrated in Figure 3-10and Figure 3-11.

Designer Reference Manual		DRM028 — Rev 0
34	BLDC Motor Control	MOTOROLA
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