CKI Input Signal Characteristics
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Note: AC testing inputs are driven at VIH for logic ‘‘1’’ and VIL for a logic ‘‘0’’. Output timing measurements are made at VCC/2 for both logic ‘‘1’’ and logic ‘‘0’’.
FIGURE 2. Input and Output for AC Tests
Timing Waveforms
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FIGURE 3. CK1, CK2, ALE Timing Diagram
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FIGURE 4. Write Cycle
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