I

– SIGNAL

I+ Vs

+ SIGNAL

 

V

 

 

 

 

 

 

V+

– TRANSCEIVER

Figure 3. Voltage and current definitions

Figure 4 defines the signaling sense of the voltages appearing on the – signal and + signal lines as follows:

a.The – signal terminal of the driver shall be negative with respect to the + signal terminal for an asserted state.

b.The – signal terminal of the driver shall be positive with respect to the + signal terminal for a negated state.

 

LOGICAL 1

LOGICAL 0

LOGICAL 1

 

(ASSERTED)

(NEGATED)

(ASSERTED)

VOLTAGE

(TRUE)

(FALSE)

(TRUE)

+

 

 

V

VCM=(V++V)/2

VCM

BUS

 

 

V

 

 

DIFFERENTIAL

 

 

VN

+

 

VBIAS

–V

 

 

0V (OFF)

 

V

 

VA

 

 

 

 

 

TIME

 

Figure 4. LVD Signaling sense

Note. For a description of VBIAS see Section 7.3.1 of ANSI specification (SPI-5), T10/1525D.

2.3OR-tied signals

The BSY, SEL, and RST signals shall be OR-tied. BSY and RST signals may be simultaneously driven true by several SCSI devices. No signals other than BSY, SEL, RST, DB(P_CRCA), and DB(P1) are simultaneously driven by two or more SCSI devices. DB(P_CRCA) and DB(P1) shall not be driven false during the ARBITRA- TION PHASE but may be driven false in other phases.

18

Parallel SCSI Interface Product Manual, Rev. A )

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Image 32
Seagate Ultra 320, Ultra 160 manual OR-tied signals, Voltage and current definitions