Seagate Ultra 320, Ultra 160 manual 12.6 REQ/ACK offset, Transfer width exponent

2.12.6REQ/ACK offset

The REQ/ACK OFFSET field determines the maximum number of REQs allowed to be outstanding before a corresponding ACK is received at the SCSI target port during synchronous or paced transfers. For ST synchro- nous transfers the REQ/ACK offset is the number of REQ assertions that may be sent by the SCSI target port in advance of the number of ACK assertions received from the SCSI initiator port.

For DT synchronous transfers the REQ/ACK offset is the number of REQ transitions that may be sent by the SCSI target port in advance of the number of ACK transitions received from the SCSI initiator port. For paced transfers in DT DATA IN phase the REQ/ACK offset is the number of data valid state REQ assertions that may be sent by the SCSI target port in advance of ACK assertions received from the SCSI initiator port.

For paced transfers in DT DATA OUT phase the REQ/ACK offset is the number of REQ assertions that may be sent by the SCSI target port in advance of the number of data valid state ACK assertions received from the SCSI initiator port.

See Section 2.9 for an explanation of the differences between ST and DT data transfers.

The REQ/ACK OFFSET value is chosen to prevent overflow conditions in the port’s receive buffer and offset counter. The REQ/ACK OFFSET values and which timing values shall be selected are defined in Table 7.

Table 16.	REQ/ACK Offset
Value		Description	Timing values
00h		Specifies asynchronous transfer agreement. a	Asynchronous. (see Table 5)
01h - FEh		Synchronous or paced transfers with specified offset.	Determined by transfer period factor
			(see Table 14).
FFh		Synchronous or paced transfers with unlimited offset.	Determined by transfer period factor
			(see Table 14).
a	Transfer period factor and protocol options other than QAS_REQ shall be ignored.

Table 20 defines valid combinations of REQ/ACK OFFSET and other fields.

2.12.7Transfer width exponent

The TRANSFER WIDTH EXPONENT field defines the transfer width to be used during DATA IN and DATA OUT phases. The values are defined in Table 17.

If any of the protocol options bits other than QAS_REQ are set to one, then only wide transfer agreements are valid. If all the protocol options bits other than QAS_REQ are set to zero, wide transfer agreements and narrow transfer agreements are valid.

Table 17: Transfer width exponent

Value	Description
00h	Specifies 8-bit data bus (i.e., narrow transfer agreement)
01h	Specifies 16-bit data bus (i.e., wide transfer agreement)
02h	Obsolete
03h - FFh	Reserved

Table 20 defines valid combinations of TRANSFER WIDTH EXPONENT and other fields.

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