Data transfer modes, Asynchronous transfers | Seagate Ultra 160

The receiver skew compensation and clock shifting adjust the timing relationship between the clocking signal (i.e., REQ or ACK) and the signals being clocked (e.g., the data bus signals). That adjustment causes the clock signal to align with the middle of the signals being clocked when those signals enter the receiver. The receiver is then able to the clock signal to latch valid data.

During paced transfers, the clock signal (i.e., REQ or ACK) transitions at the negotiated transfer period. Data is qualified by the clock signal and the phase of the P1 signal.

Receiver skew compensation is not defined in this manual.

SCSI Device

Driver

Precomp

Cable

and/or

Backplane

SCSI Device

Signal

AdjustmentReceiver

Optional

Skew

Compensator

&Clock Shift

Figure 9. Example of a SCSI bus with paced transfers

2.9Data transfer modes

There are three types of transfer modes:

•Asynchronous

•Synchronous

•Paced

This section provides a brief description of each of these types of transfer modes.

2.9.1Asynchronous transfers

SCSI device ports default to 8-bit asynchronous transfers.

8-bit asynchronous transfers are used for all COMMAND, STATUS, and MESSAGE phases.

ST DATA phases may use 8-bit or 16-bit asynchronous transfers. Asynchronous transfers are not permitted in DT DATA phases.

2.9.2Synchronous transfers

ST DATA phases shall use synchronous transfers when a synchronous transfer agreement is in effect. ST DATA phases may use 8-bit or 16-bit synchronous transfers.

DT DATA phases shall use synchronous transfers when a synchronous transfer agreement is in effect. DT DATA phases shall only use wide transfers.

2.9.3Paced transfers

Paced transfers shall only be used in DT DATA phases when a paced transfer agreement is in effect. DT phases shall only use wide transfers.

Parallel SCSI Interface Product Manual, Rev. A )

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Seagate Ultra 160, Ultra 320 manual Data transfer modes, Asynchronous transfers, Synchronous transfers, Paced transfers

Contents

Parallel Scsi Interface Page Parallel Scsi Interface Page Revision Date Writer/Engineer Revision status summary sheet Parallel Scsi Interface Product Manual, Rev. a Table of Contents Parallel Scsi Interface Product Manual, Rev. a Wide transfer Logical characteristics Message system specification Miscellaneous Scsi bus characteristics Scsi commandsSPI information units Drive features List of Figures Xii Parallel Scsi Interface Product Manual, Rev. a Interface requirements How to use this interface manual Scope of Scsi standards Applicable standards General interface description Scsi client-server model GlossaryPage Page Page Page Page Page Keywords Physical interface characteristics Summary of Scsi messagesMessage Name Hex Code Number Scsi bus Priority Scsi IDs and associated Scsi bus arbitration priorities Scsi bus signals overview Scsi target usage of Pcrca Pcrc signal usage requirements LVD signals Signal statesSignal values SE signals Voltage and current definitions OR-tied signals DB7-0 Signal sourcesSignal sources Data bit P cable Data bit a cable I/O DB15-8 Scsi bus phase Reference Type Value ns Unless Timing description Scsi bus timingScsi bus control timing values in nanoseconds Timing Timing values for negotiated transfer rate in nanoseconds Scsi bus data and information phase ST timing valuesTiming values for negotiated transfer rate Nanoseconds unless otherwise notedPage ATN transmit setup time Min Receive Scsi bus data and information phase DT timing values Total transmitter error budget Receiver errors Fast-160 Fast-320 CommentsInterconnect and system margin ISI of data ATN transmit setup timeATN receive setup time Crosstalk time shift Bus settle delay Bus clear delayBus free delay Bus set delay PCRC transmit setup time Flow control receive setup timeFlow control transmit setup time PCRC receive setup time QAS arbitration delay Data release delayPhysical disconnection delay Power on to selection Receive negation period Receive internal setup timeReceive setup time Receive internal hold time Residual skew error Reset delayReset hold time Reset to selection System noise at launch System deskew delaySkew correction range Strobe offset tolerance Measurement points LVD measurement points Clocking methods for data transfers ST latching data vs. DT latching data DT synchronous transfer example Paced transfer on a Scsi bus Paced transfers Data transfer modesAsynchronous transfers Synchronous transfers Information unit transfers ST Data phase parallel transfersDT Data phase parallel transfers Data group transfers Negotiation algorithm Negotiation Negotiation message pair Field name When to negotiateNegotiable fields Negotiable fields and effects of successful negotiation Responding message requirements Response shall beField Name Message Numerically Transfer agreements Synchronous Transfer period factorTransfer period factor relationships Value Description Message Transfer rate Transfer width exponent 12.6 REQ/ACK offset Protocol options Protocol options bitsIureq PPR negotiation keeping Iureq set to zero Bus phases resulting from Iureq changesSdtr negotiation PPR negotiation setting Iureq to one PPR negotiation setting Iureq to zero Pcompen WrflowRdstrm RTI Retain Training Information Negotiable field combinations TransferTransfer Period Negotiation message sequences Message restrictions Parallel Scsi Interface Product Manual, Rev. a Scsi bus phases overview BUS Free phaseUnexpected and expected bus free phases Arbitration and QAS overview Expected bus free phases Normal Arbitration phase QAS protocol QAS phase overview Selection phase Information unit transfers disabled Information unit transfers enabledSelection overview Selection using attention condition timeout procedure Reselection phase Reselection phase overviewPhysical reconnection Scsi bus fairness Physical reconnection timeout procedure Information transfer phases Information transfer phasesSignal Phase Direction of transfer Comment Asynchronous transfer Synchronous transferST synchronous data transfer Information unit transfer DT synchronous transferPage Data group data field transfer Page Page Page Paced transfer training pattern Paced transfer DT Data in phase training pattern Start of section aStart of section B Start of section C DT Data OUT phase training pattern 3.2 P1 data valid/invalid state transitions Starting pacing transfers with no training pattern Starting pacing transfers at end of training pattern Paced information unit transfer Ending pacing transfers Wide transfer Deskewing Data phase Command phase Message phase Status phase Message OUT phase exception condition handling Signal restrictions between phasesMessage in phase exception condition handling Message OUT phase Scsi bus phase sequences overview Scsi bus phase sequences Hard reset or protocol error Reselection Selection Arbitration DT Data Message OUT Data bus protection overview ST data bus protection using parityParity checking rules for Selection and Reselection phases Data bus protection Order of bytes in the CRC field Error detection capabilities Message formats General message protocols and formats Extended messages Message formatOne-byte messages Two-byte messages Message categories Extended Message CodesLink Control Messages Link Control message codes Key Bit Byte DisconnectIdentify Identify message format Invalid data bits Ignore Wide ResidueIgnore Wide Residue message format Ignore field definition Message Reject Initiator Detected ErrorLinked Command Complete Message Parity Error Modify Bidirectional Data Pointer Modify Data Pointer message format No Operation Modify Bidirectional Data Pointer message format Parallel Protocol Request message format Parallel Protocol Request Value 00h 01h-FEh FFh Description Timing values Use ST Data in and ST Data OUT phases to transfer data Valid protocol options bit combinationsUse QAS for arbitration Parallel Protocol Request messages implied agreement Restore Pointers QAS RequestSave Data Pointers Synchronous Data Transfer Request message format Synchronous Data Transfer Request Sdtr messages implied agreements Target initiated Sdtr negotiation Initiator initiated Sdtr negotiationTask Complete Wide Data Transfer Request message format Wide Data Transfer Request Wdtr message implied agreement Target initiated Wdtr negotiationResponding Scsi device Wdtr response Implied agreement Task attribute message overview and codes Task attribute messages Task attribute message codes ACA Auto Contingent AllegianceACA message format Ordered Head of Queue 0Eh Task management messagesTask management message codes Task management message codes Abort Task Clear ACA Logical Unit ResetTarget Reset Abort Task SET Miscellaneous Scsi bus characteristics Hard reset Bus reset condition Asynchronous condition recovery Reset events Saved pointers Active pointers Command processing considerations and exception conditions Asynchronous event notificationIncorrect initiator connection Unexpected Reselection phase Information unit transfer logical operations SPI information unitsPage Parallel Scsi Interface Product Manual, Rev. a 115 116 Parallel Scsi Interface Product Manual, Rev. a Parallel Scsi Interface Product Manual, Rev. a 117 SPI information units SPI command information unit SPI command information unit Bit Byte Task Management flags Codes Description Task Attribute Codes Description SPI LQ information unit Bit Byte SPI LQ information unit Bidi Direction FFh All SPI LQ information unit typeCodes Type Description F0HPage SPI data information unit SPI data stream information unitSPI data information unit Bit Byte SPI status data stream information unit Bit Byte SPI status information unit SPI status information unit Bit ByteReserved Reserved for FCP Task management function not supported SPI command information unit fields invalidPacketized Failures field Bit Byte Packetized Failures code Codes DescriptionPage 130 Parallel Scsi Interface Product Manual, Rev. a Command implementation requirements Command Descriptor Block CDBReserved Page Fixed and variable length Command Descriptor Block formats Typical CDB for 12-byte commands Bit Byte Typical CDB for 16-byte commands Bit ByteAdditional CDB Data if required Additional CDB Length n-7 Typical variable length CDB Bit Byte Operation Code 7FhPage Control field Bit Byte Last Naca aLink b Status Status precedence Single command example Command examples Disconnect example Disconnect example Auto Contingent Allegiance or Contingent Allegiance Timing examples Clearing an Auto Contingent Allegiance condition Overlapped commands Incorrect logical unit selection Sense dataAsynchronous Event Reporting Autosense Unit Attention condition Untagged task queuing Target hard resetLogical unit reset Queued tasks formerly queued I/O processes Tagged task queuing Programmable operating definition Parameter rounding Incorrect initiator connection Short and extended self-tests Default self-testS.M.A.R.T. system Self-test operations Foreground mode Background modeSelf-test modes Device type a Command Reference All device types Exception commands for background self-tests Self-test mode summary Error detection for asynchronous information phasesProtection code Word Location Signal Meaning Covered signalsPage Error detection properties Code descriptionProtection code usage Disabling protection code checking Error handlingProtection code transmission Enabling protection code checking Case 1-Power off during removal or insertion SPI-3 to SCSI-2 terminology mapping SPI-3 to SCSI-2 terminology mappingSPI-3 equivalent term SCSI-2 term Index Code value reserved Disconnect privilege 148 domain 5, 9 dormant Initiator 3, 6, 14, 131, 140 faulted Multidrop 7 multimode Page Scsi Page Wdtr 40 170 Parallel Scsi Interface Product Manual, Rev. a Page Seagate Technology LLC