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Seagate Ultra 160, Ultra 320 manual Hard reset or protocol error

Models: Ultra 320 Ultra 160

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The final information transfer phase is normally the MESSAGE IN phase where a DISCONNECT or TASK COMPLETE message is transferred, followed by the BUS FREE phase.

Hard reset or protocol error

MESSAGE OUT

SELECTION

COMMAND

BUS FREE

ARBITRATION

DATA

RESELECTION

STATUS

MESSAGE IN

Figure 11. Phase sequences for physical reconnection and selection using attention condition with information unit transfers disabled

3.11.3Phase sequences for selection without using attention condition with information unit transfers disabled

The allowable sequences for either physical reconnection or selection using attention condition while an infor- mation unit transfer agreement is not in effect shall be as shown in Figure 12.

The normal progression for selection without using attention condition (see Section 3.2.1.1.2) is:

1.from the BUS FREE phase to ARBITRATION;

2.from ARBITRATION to SELECTION;

3.from SELECTION to COMMAND phase;

4.from COMMAND phase to DATA phase;

5.from DATA phase to STATUS phase;

6.from STATUS phase to MESSAGE IN phase where a TASK COMPLETE message is transferred; and

7.from MESSAGE IN to BUS FREE phase.

Hard reset or protocol error

COMMAND

(note)

SELECTION

DATA

BUS FREE

ARBITRATION

STATUS

MESSAGE IN

MESSAGE OUT

Figure 12. Phase sequences for selection without using attention condition with information unit transfers disabled

Parallel SCSI Interface Product Manual, Rev. A

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Image 93

Seagate Ultra 160, Ultra 320 manual Hard reset or protocol error

Contents

Parallel Scsi Interface Page Parallel Scsi Interface Page Revision Date Writer/Engineer Revision status summary sheetParallel Scsi Interface Product Manual, Rev. a Table of Contents Parallel Scsi Interface Product Manual, Rev. a Wide transfer Logical characteristicsMessage system specification Miscellaneous Scsi bus characteristics Scsi commandsSPI information units Drive features List of Figures Xii Parallel Scsi Interface Product Manual, Rev. a Interface requirements How to use this interface manualScope of Scsi standards Applicable standards General interface descriptionScsi client-server model GlossaryPage Page Page Page Page Page Keywords Physical interface characteristics Summary of Scsi messagesMessage Name Hex Code Number Scsi bus Priority Scsi IDs and associated Scsi bus arbitration prioritiesScsi bus signals overview Scsi target usage of Pcrca Pcrc signal usage requirementsSignal values Signal statesSE signals LVD signalsVoltage and current definitions OR-tied signalsSignal sources Signal sourcesData bit P cable Data bit a cable I/O DB15-8 Scsi bus phase DB7-0Scsi bus control timing values in nanoseconds Scsi bus timingTiming Reference Type Value ns Unless Timing descriptionTiming values for negotiated transfer rate Scsi bus data and information phase ST timing valuesNanoseconds unless otherwise noted Timing values for negotiated transfer rate in nanosecondsPage ATN transmit setup time Min Receive Scsi bus data and information phase DT timing values Total transmitter error budget Receiver errors Fast-160 Fast-320 CommentsInterconnect and system margin ATN receive setup time ATN transmit setup timeCrosstalk time shift ISI of dataBus free delay Bus clear delayBus set delay Bus settle delayFlow control transmit setup time Flow control receive setup timePCRC receive setup time PCRC transmit setup timePhysical disconnection delay Data release delayPower on to selection QAS arbitration delayReceive setup time Receive internal setup timeReceive internal hold time Receive negation periodReset hold time Reset delayReset to selection Residual skew errorSkew correction range System deskew delayStrobe offset tolerance System noise at launchMeasurement points LVD measurement points Clocking methods for data transfersST latching data vs. DT latching data DT synchronous transfer example Paced transfer on a Scsi busAsynchronous transfers Data transfer modesSynchronous transfers Paced transfersDT Data phase parallel transfers ST Data phase parallel transfersData group transfers Information unit transfersNegotiation algorithm NegotiationNegotiable fields When to negotiateNegotiable fields and effects of successful negotiation Negotiation message pair Field nameResponding message requirements Response shall beField Name Message Numerically Transfer agreements Transfer period factor relationships Transfer period factorValue Description Message Transfer rate SynchronousTransfer width exponent 12.6 REQ/ACK offsetProtocol options Protocol options bitsIureq Sdtr negotiation PPR negotiation setting Iureq to one Bus phases resulting from Iureq changesPPR negotiation setting Iureq to zero PPR negotiation keeping Iureq set to zeroRdstrm WrflowRTI Retain Training Information PcompenNegotiable field combinations TransferTransfer Period Negotiation message sequences Message restrictionsParallel Scsi Interface Product Manual, Rev. a Scsi bus phases overview BUS Free phaseUnexpected and expected bus free phases Arbitration and QAS overview Expected bus free phasesNormal Arbitration phase QAS protocol QAS phase overviewSelection phase Information unit transfers disabled Information unit transfers enabledSelection overview Selection using attention condition timeout procedure Reselection phase Reselection phase overviewPhysical reconnection Scsi bus fairness Physical reconnection timeout procedureInformation transfer phases Information transfer phasesSignal Phase Direction of transfer Comment Asynchronous transfer Synchronous transferST synchronous data transfer Information unit transfer DT synchronous transferPage Data group data field transfer Page Page Page Paced transfer training pattern Paced transferDT Data in phase training pattern Start of section aStart of section B Start of section C DT Data OUT phase training pattern3.2 P1 data valid/invalid state transitions Starting pacing transfers with no training pattern Starting pacing transfers at end of training patternPaced information unit transfer Ending pacing transfersWide transfer DeskewingData phase Command phaseMessage phase Status phaseMessage in phase exception condition handling Signal restrictions between phasesMessage OUT phase Message OUT phase exception condition handlingScsi bus phase sequences overview Scsi bus phase sequencesHard reset or protocol error Reselection Selection Arbitration DT Data Message OUT Parity checking rules for Selection and Reselection phases ST data bus protection using parityData bus protection Data bus protection overviewOrder of bytes in the CRC field Error detection capabilitiesMessage formats General message protocols and formatsOne-byte messages Message formatTwo-byte messages Extended messagesMessage categories Extended Message CodesLink Control Messages Link Control message codes Key Identify DisconnectIdentify message format Bit ByteIgnore Wide Residue message format Ignore Wide ResidueIgnore field definition Invalid data bitsLinked Command Complete Initiator Detected ErrorMessage Parity Error Message RejectModify Bidirectional Data Pointer Modify Data Pointer message formatNo Operation Modify Bidirectional Data Pointer message formatParallel Protocol Request message format Parallel Protocol RequestValue 00h 01h-FEh FFh Description Timing values Use ST Data in and ST Data OUT phases to transfer data Valid protocol options bit combinationsUse QAS for arbitration Parallel Protocol Request messages implied agreement Restore Pointers QAS RequestSave Data Pointers Synchronous Data Transfer Request message format Synchronous Data Transfer RequestSdtr messages implied agreements Target initiated Sdtr negotiation Initiator initiated Sdtr negotiationTask Complete Wide Data Transfer Request message format Wide Data Transfer RequestWdtr message implied agreement Target initiated Wdtr negotiationResponding Scsi device Wdtr response Implied agreement Task attribute message overview and codes Task attribute messagesTask attribute message codes ACA Auto Contingent AllegianceACA message format Ordered Head of QueueTask management message codes Task management message codes Task management messagesAbort Task 0EhTarget Reset Logical Unit ResetAbort Task SET Clear ACAMiscellaneous Scsi bus characteristics Hard reset Bus reset conditionAsynchronous condition recovery Reset eventsSaved pointers Active pointersCommand processing considerations and exception conditions Asynchronous event notificationIncorrect initiator connection Unexpected Reselection phase Information unit transfer logical operations SPI information unitsPage Parallel Scsi Interface Product Manual, Rev. a 115 116 Parallel Scsi Interface Product Manual, Rev. a Parallel Scsi Interface Product Manual, Rev. a 117 SPI information units SPI command information unitSPI command information unit Bit Byte Task Management flags Codes Description Task Attribute Codes DescriptionSPI LQ information unit Bit Byte SPI LQ information unitBidi Direction Codes Type Description SPI LQ information unit typeF0H FFh AllPage SPI data information unit SPI data stream information unitSPI data information unit Bit Byte SPI status data stream information unit Bit Byte SPI status information unit SPI status information unit Bit ByteReserved Reserved for FCP Packetized Failures field Bit Byte SPI command information unit fields invalidPacketized Failures code Codes Description Task management function not supportedPage 130 Parallel Scsi Interface Product Manual, Rev. a Command implementation requirements Command Descriptor Block CDBReserved Page Fixed and variable length Command Descriptor Block formats Typical CDB for 12-byte commands Bit Byte Typical CDB for 16-byte commands Bit ByteAdditional CDB Data if required Additional CDB Length n-7 Typical variable length CDB Bit Byte Operation Code 7FhPage Control field Bit Byte Last Naca aLink b Status Status precedence Single command example Command examplesDisconnect example Disconnect exampleAuto Contingent Allegiance or Contingent Allegiance Timing examplesClearing an Auto Contingent Allegiance condition Overlapped commandsIncorrect logical unit selection Sense dataAsynchronous Event Reporting Autosense Unit Attention condition Logical unit reset Target hard resetQueued tasks formerly queued I/O processes Untagged task queuingTagged task queuing Programmable operating definition Parameter roundingIncorrect initiator connection S.M.A.R.T. system Default self-testSelf-test operations Short and extended self-testsForeground mode Background modeSelf-test modes Device type a Command Reference All device types Exception commands for background self-testsSelf-test mode summary Error detection for asynchronous information phasesProtection code Word Location Signal Meaning Covered signalsPage Error detection properties Code descriptionProtection code usage Protection code transmission Error handlingEnabling protection code checking Disabling protection code checkingCase 1-Power off during removal or insertion SPI-3 to SCSI-2 terminology mapping SPI-3 to SCSI-2 terminology mappingSPI-3 equivalent term SCSI-2 term Index Code value reserved Disconnect privilege 148 domain 5, 9 dormant Initiator 3, 6, 14, 131, 140 faulted Multidrop 7 multimode Page Scsi Page Wdtr 40 170 Parallel Scsi Interface Product Manual, Rev. a Page Seagate Technology LLC