Data bus protection | Seagate Ultra 160, Ultra 320 manual

3.11.5Phase sequences for physical selection using attention condition with information unit transfers enabled

The sequences for a selection with attention condition while an information unit transfer agreement is in effect shall be as shown in Figure 14.

The normal progression for selection using attention condition (see Section 3.2.1.1.3) if QAS is disabled is:

1.from the BUS FREE phase to ARBITRATION;

2.from ARBITRATION to SELECTION;

3.from SELECTION to MESSAGE OUT;

4.from MESSAGE OUT to MESSAGE IN; and

5.from MESSAGE IN to BUS FREE.

Hard reset or protocol error

SELECTION

ARBITRATION

BUS FREE

MESSAGE OUT

MESSAGE IN

Figure 14. Phase sequences for selection with attention condition/physical reconnection and information unit transfers enabled

3.12Data bus protection

3.12.1Data bus protection overview

The data bus DB(P_CRCA) signal and the DB(P1) signals are used to generate parity or control the transfer of pCRC information on the Data Bus.

3.12.2ST data bus protection using parity

For ARBITRATION phase the DB(P_CRCA) and DB(P1) signals shall not be checked for parity errors. For SELECTION and RESELECTION phases, valid parity is determined by the rules in Table 23.

Table 23: Parity checking rules for SELECTION and RESELECTION phases

Action	Condition


Check for odd parity on:	If at least one bit is active on:
DB(7-0,P_CRCA)	DB(15-0,P_CRCA,P1)
DB(15-8,P1)	DB(15-8,P1)

Note. These rules are necessary to permit interoperation of SCSI devices with different Data Bus widths. For example, if an 8-bit SCSI device selects a 16-bit SCSI device, the 16-bit SCSI device observes invalid parity on the upper 8 bits of the Data Bus.

Parallel SCSI Interface Product Manual, Rev. A

81

Image 95

Seagate Ultra 160, Ultra 320 manual Data bus protection overview, ST data bus protection using parity

Contents

Parallel Scsi Interface Page Parallel Scsi Interface Page Revision Date Writer/Engineer Revision status summary sheet Parallel Scsi Interface Product Manual, Rev. a Table of Contents Parallel Scsi Interface Product Manual, Rev. a Wide transfer Logical characteristics Message system specification SPI information units Miscellaneous Scsi bus characteristicsScsi commands Drive features List of Figures Xii Parallel Scsi Interface Product Manual, Rev. a Interface requirements How to use this interface manual Scope of Scsi standards Applicable standards General interface description Scsi client-server model GlossaryPage Page Page Page Page Page Keywords Message Name Hex Code Number Physical interface characteristicsSummary of Scsi messages Scsi bus Priority Scsi IDs and associated Scsi bus arbitration priorities Scsi bus signals overview Scsi target usage of Pcrca Pcrc signal usage requirements LVD signals Signal statesSignal values SE signals Voltage and current definitions OR-tied signals DB7-0 Signal sourcesSignal sources Data bit P cable Data bit a cable I/O DB15-8 Scsi bus phase Reference Type Value ns Unless Timing description Scsi bus timingScsi bus control timing values in nanoseconds Timing Timing values for negotiated transfer rate in nanoseconds Scsi bus data and information phase ST timing valuesTiming values for negotiated transfer rate Nanoseconds unless otherwise notedPage ATN transmit setup time Min Receive Scsi bus data and information phase DT timing values Interconnect and system margin Total transmitter error budget Receiver errorsFast-160 Fast-320 Comments ISI of data ATN transmit setup timeATN receive setup time Crosstalk time shift Bus settle delay Bus clear delayBus free delay Bus set delay PCRC transmit setup time Flow control receive setup timeFlow control transmit setup time PCRC receive setup time QAS arbitration delay Data release delayPhysical disconnection delay Power on to selection Receive negation period Receive internal setup timeReceive setup time Receive internal hold time Residual skew error Reset delayReset hold time Reset to selection System noise at launch System deskew delaySkew correction range Strobe offset tolerance Measurement points LVD measurement points Clocking methods for data transfers ST latching data vs. DT latching data DT synchronous transfer example Paced transfer on a Scsi bus Paced transfers Data transfer modesAsynchronous transfers Synchronous transfers Information unit transfers ST Data phase parallel transfersDT Data phase parallel transfers Data group transfers Negotiation algorithm Negotiation Negotiation message pair Field name When to negotiateNegotiable fields Negotiable fields and effects of successful negotiation Field Name Message Numerically Responding message requirementsResponse shall be Transfer agreements Synchronous Transfer period factorTransfer period factor relationships Value Description Message Transfer rate Transfer width exponent 12.6 REQ/ACK offset Iureq Protocol optionsProtocol options bits PPR negotiation keeping Iureq set to zero Bus phases resulting from Iureq changesSdtr negotiation PPR negotiation setting Iureq to one PPR negotiation setting Iureq to zero Pcompen WrflowRdstrm RTI Retain Training Information Transfer Period Negotiable field combinationsTransfer Negotiation message sequences Message restrictions Parallel Scsi Interface Product Manual, Rev. a Unexpected and expected bus free phases Scsi bus phases overviewBUS Free phase Arbitration and QAS overview Expected bus free phases Normal Arbitration phase QAS protocol QAS phase overview Selection phase Selection overview Information unit transfers disabledInformation unit transfers enabled Selection using attention condition timeout procedure Physical reconnection Reselection phaseReselection phase overview Scsi bus fairness Physical reconnection timeout procedure Signal Phase Direction of transfer Comment Information transfer phasesInformation transfer phases ST synchronous data transfer Asynchronous transferSynchronous transfer Information unit transfer DT synchronous transferPage Data group data field transfer Page Page Page Paced transfer training pattern Paced transfer Start of section B DT Data in phase training patternStart of section a Start of section C DT Data OUT phase training pattern 3.2 P1 data valid/invalid state transitions Starting pacing transfers with no training pattern Starting pacing transfers at end of training pattern Paced information unit transfer Ending pacing transfers Wide transfer Deskewing Data phase Command phase Message phase Status phase Message OUT phase exception condition handling Signal restrictions between phasesMessage in phase exception condition handling Message OUT phase Scsi bus phase sequences overview Scsi bus phase sequences Hard reset or protocol error Reselection Selection Arbitration DT Data Message OUT Data bus protection overview ST data bus protection using parityParity checking rules for Selection and Reselection phases Data bus protection Order of bytes in the CRC field Error detection capabilities Message formats General message protocols and formats Extended messages Message formatOne-byte messages Two-byte messages Link Control Messages Link Control message codes Message categoriesExtended Message Codes Key Bit Byte DisconnectIdentify Identify message format Invalid data bits Ignore Wide ResidueIgnore Wide Residue message format Ignore field definition Message Reject Initiator Detected ErrorLinked Command Complete Message Parity Error Modify Bidirectional Data Pointer Modify Data Pointer message format No Operation Modify Bidirectional Data Pointer message format Parallel Protocol Request message format Parallel Protocol Request Value 00h 01h-FEh FFh Description Timing values Use QAS for arbitration Use ST Data in and ST Data OUT phases to transfer dataValid protocol options bit combinations Parallel Protocol Request messages implied agreement Save Data Pointers Restore PointersQAS Request Synchronous Data Transfer Request message format Synchronous Data Transfer Request Sdtr messages implied agreements Task Complete Target initiated Sdtr negotiationInitiator initiated Sdtr negotiation Wide Data Transfer Request message format Wide Data Transfer Request Responding Scsi device Wdtr response Implied agreement Wdtr message implied agreementTarget initiated Wdtr negotiation Task attribute message overview and codes Task attribute messages ACA message format Task attribute message codesACA Auto Contingent Allegiance Ordered Head of Queue 0Eh Task management messagesTask management message codes Task management message codes Abort Task Clear ACA Logical Unit ResetTarget Reset Abort Task SET Miscellaneous Scsi bus characteristics Hard reset Bus reset condition Asynchronous condition recovery Reset events Saved pointers Active pointers Incorrect initiator connection Command processing considerations and exception conditionsAsynchronous event notification Unexpected Reselection phase Information unit transfer logical operations SPI information unitsPage Parallel Scsi Interface Product Manual, Rev. a 115 116 Parallel Scsi Interface Product Manual, Rev. a Parallel Scsi Interface Product Manual, Rev. a 117 SPI information units SPI command information unit SPI command information unit Bit Byte Task Management flags Codes Description Task Attribute Codes Description SPI LQ information unit Bit Byte SPI LQ information unit Bidi Direction FFh All SPI LQ information unit typeCodes Type Description F0HPage SPI data information unit Bit Byte SPI data information unitSPI data stream information unit SPI status data stream information unit Bit Byte Reserved Reserved for FCP SPI status information unitSPI status information unit Bit Byte Task management function not supported SPI command information unit fields invalidPacketized Failures field Bit Byte Packetized Failures code Codes DescriptionPage 130 Parallel Scsi Interface Product Manual, Rev. a Reserved Command implementation requirementsCommand Descriptor Block CDB Page Fixed and variable length Command Descriptor Block formats Additional CDB Data if required Typical CDB for 12-byte commands Bit ByteTypical CDB for 16-byte commands Bit Byte Additional CDB Length n-7 Typical variable length CDB Bit Byte Operation Code 7FhPage Link b Control field Bit Byte LastNaca a Status Status precedence Single command example Command examples Disconnect example Disconnect example Auto Contingent Allegiance or Contingent Allegiance Timing examples Clearing an Auto Contingent Allegiance condition Overlapped commands Asynchronous Event Reporting Incorrect logical unit selectionSense data Autosense Unit Attention condition Untagged task queuing Target hard resetLogical unit reset Queued tasks formerly queued I/O processes Tagged task queuing Programmable operating definition Parameter rounding Incorrect initiator connection Short and extended self-tests Default self-testS.M.A.R.T. system Self-test operations Self-test modes Foreground modeBackground mode Device type a Command Reference All device types Exception commands for background self-tests Protection code Self-test mode summaryError detection for asynchronous information phases Word Location Signal Meaning Covered signalsPage Protection code usage Error detection propertiesCode description Disabling protection code checking Error handlingProtection code transmission Enabling protection code checking Case 1-Power off during removal or insertion SPI-3 equivalent term SCSI-2 term SPI-3 to SCSI-2 terminology mappingSPI-3 to SCSI-2 terminology mapping Index Code value reserved Disconnect privilege 148 domain 5, 9 dormant Initiator 3, 6, 14, 131, 140 faulted Multidrop 7 multimode Page Scsi Page Wdtr 40 170 Parallel Scsi Interface Product Manual, Rev. a Page Seagate Technology LLC