Table 22: Wide SCSI byte order

Transfer

SCSI bus

 

Data

 

 

 

transfer

 

 

 

number

15....8

 

7....0

width

 

 

 

 

 

 

 

 

 

 

1

N/A

 

W

8-bit

 

 

 

 

 

2

N/A

 

X

 

 

 

 

 

 

3

N/A

 

Y

 

 

 

 

 

 

4

N/A

 

Z

 

 

 

 

 

 

1

X

 

W

16-bit

 

 

 

 

 

2

Z

 

Y

 

When transferring consecutive bytes W, X, Y, and Z across the buses, they are transferred as shown above.

This table does not necessarily represent how these bytes are stored in device memory.

If the last information byte transferred does not fall on the DB(15-8) signals for a 16-bit wide transfer, then the values of the remaining higher-numbered bits are undefined. However, when using parity protection, the DB(P1) signal for this undefined byte shall be valid for whatever data is placed on the bus.

3.6COMMAND phase

3.6.1COMMAND phase description

The COMMAND phase allows the target to request command information from the initiator.

The SCSI target port shall assert the C/D signal and negate the I/O and MSG signals during the REQ/ACK handshakes of this phase.

A QAS-capable initiator shall wait a minimum of a QAS non-data phase REQ(ACK) period to assert ACK after detecting the assertion of REQ.

A QAS-capable initiator shall assert ACK for a minimum of a QAS non-data phase REQ(ACK) period and shall keep the command data valid until the negation of ACK.

3.6.2COMMAND phase exception condition handling

If the target detects one or more parity errors on the command bytes received, it may retry the command by switching to the MESSAGE IN phase and sending a RESTORE POINTERS message. The target shall then switch to the COMMAND phase to receive the original command.

If the target does not retry the COMMAND phase or it exhausts its retry limit it shall return CHECK CONDITION status and set the sense key to Aborted Command and the additional sense code to SCSI Parity Error.

3.7DATA phase

3.7.1DATA phase overview

DATA phase is a term that encompasses both the ST DATA phases and the DT DATA phases. ST DATA phase is a term that encompasses both the ST DATA IN phase and ST DATA OUT phase. DT DATA phase is a term that encompasses both the DT DATA IN phase, and the DT DATA OUT phase.

3.7.2DT DATA IN phase

The DT DATA IN phase allows the target to request that data be sent to the initiator from the target using DT data transfers. The target shall assert the I/O and MSG signals and negate the C/D signal during the REQ/ACK handshakes of this phase.

Parallel SCSI Interface Product Manual, Rev. A

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Seagate Ultra 160, Ultra 320 manual Command phase, Data phase