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Seagate Ultra 320 Self-test mode summary, Error detection for asynchronous information phases

Models: Ultra 320 Ultra 160

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Table 66: Self-test mode summary

	When		Processing of subsequent
	status is	How to abort	commands while self-test is
Mode	returned	the self-test	executing	Self-test failure reporting


Foreground	After the	Abort Task task	If the command is INQUIRY, REPORT	Terminate with CHECK CONDITION
	self-test is	management	LUNS, or REQUEST SENSE,	status, Hardware Error sense key,
	complete	function	process normally. Otherwise,	and Logical Unit Failed Self-Test or
			terminate with CHECK CONDITION	Logical Unit Unable To Update Self-
			status, Not Ready sense key, and	Test Log additional sense code.
			Logical Unit Not Ready, Self-Test In
			Progress additional sense code.

Background	After the	SEND DIAG-	Process the command, except as	Application client checks Self-test
	CDB is	NOSTICs com-	described in Seagate SCSI Command	results log page after the Progress
	validated	mand with Self-	Reference Manual, Part number	Indication field returned from
		Test Code field	100293068.	REQUEST SENSE indicates the self-
		set to 100b		test is complete.

8.3Alternate error detection for the asynchronous information phases (AIP)— Command, Message, and Status

8.3.1Error detection for asynchronous information phases

This section describes an enhanced error detection method for the Command, Message, and Status asynchro- nous information transfer phases. In systems not implementing this scheme, these phases only transfer infor- mation on the lower eight data bits of a SCSI bus with only normal parity protection on those transfers. Therefore, additional check information can be transferred on the upper eight data bits in order to improve error detection capabilities. Since the upper eight data bits of the bus are used for this scheme, this error detection method is only available on wide SCSI devices that are on wide SCSI busses.

8.3.2Protection code

The following are the covered signals to be encoded and details of the protection code to be used on the asyn- chronous information phases.

154	Parallel SCSI Interface Product Manual, Rev. A

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Seagate Ultra 320, Ultra 160 Self-test mode summary, Error detection for asynchronous information phases, Protection code

Contents

Parallel Scsi Interface Page Parallel Scsi Interface Page Revision status summary sheet Revision Date Writer/EngineerParallel Scsi Interface Product Manual, Rev. a Table of Contents Parallel Scsi Interface Product Manual, Rev. a Logical characteristics Wide transferMessage system specification Miscellaneous Scsi bus characteristics Scsi commandsSPI information units Drive features List of Figures Xii Parallel Scsi Interface Product Manual, Rev. a How to use this interface manual Interface requirementsScope of Scsi standards General interface description Applicable standardsGlossary Scsi client-server modelPage Page Page Page Page Page Keywords Physical interface characteristics Summary of Scsi messagesMessage Name Hex Code Number Scsi bus Scsi IDs and associated Scsi bus arbitration priorities PriorityScsi bus signals overview Pcrc signal usage requirements Scsi target usage of PcrcaSignal states Signal valuesSE signals LVD signalsOR-tied signals Voltage and current definitionsSignal sources Signal sourcesData bit P cable Data bit a cable I/O DB15-8 Scsi bus phase DB7-0Scsi bus timing Scsi bus control timing values in nanosecondsTiming Reference Type Value ns Unless Timing descriptionScsi bus data and information phase ST timing values Timing values for negotiated transfer rateNanoseconds unless otherwise noted Timing values for negotiated transfer rate in nanosecondsPage ATN transmit setup time Min Receive Scsi bus data and information phase DT timing values Total transmitter error budget Receiver errors Fast-160 Fast-320 CommentsInterconnect and system margin ATN transmit setup time ATN receive setup timeCrosstalk time shift ISI of dataBus clear delay Bus free delayBus set delay Bus settle delayFlow control receive setup time Flow control transmit setup timePCRC receive setup time PCRC transmit setup timeData release delay Physical disconnection delayPower on to selection QAS arbitration delayReceive internal setup time Receive setup timeReceive internal hold time Receive negation periodReset delay Reset hold timeReset to selection Residual skew errorSystem deskew delay Skew correction rangeStrobe offset tolerance System noise at launchMeasurement points Clocking methods for data transfers LVD measurement pointsST latching data vs. DT latching data Paced transfer on a Scsi bus DT synchronous transfer exampleData transfer modes Asynchronous transfersSynchronous transfers Paced transfersST Data phase parallel transfers DT Data phase parallel transfersData group transfers Information unit transfersNegotiation Negotiation algorithmWhen to negotiate Negotiable fieldsNegotiable fields and effects of successful negotiation Negotiation message pair Field nameResponding message requirements Response shall beField Name Message Numerically Transfer agreements Transfer period factor Transfer period factor relationshipsValue Description Message Transfer rate Synchronous12.6 REQ/ACK offset Transfer width exponentProtocol options Protocol options bitsIureq Bus phases resulting from Iureq changes Sdtr negotiation PPR negotiation setting Iureq to onePPR negotiation setting Iureq to zero PPR negotiation keeping Iureq set to zeroWrflow RdstrmRTI Retain Training Information PcompenNegotiable field combinations TransferTransfer Period Message restrictions Negotiation message sequencesParallel Scsi Interface Product Manual, Rev. a Scsi bus phases overview BUS Free phaseUnexpected and expected bus free phases Expected bus free phases Arbitration and QAS overviewNormal Arbitration phase QAS phase overview QAS protocolSelection phase Information unit transfers disabled Information unit transfers enabledSelection overview Selection using attention condition timeout procedure Reselection phase Reselection phase overviewPhysical reconnection Physical reconnection timeout procedure Scsi bus fairnessInformation transfer phases Information transfer phasesSignal Phase Direction of transfer Comment Asynchronous transfer Synchronous transferST synchronous data transfer DT synchronous transfer Information unit transferPage Data group data field transfer Page Page Page Paced transfer Paced transfer training patternDT Data in phase training pattern Start of section aStart of section B DT Data OUT phase training pattern Start of section C3.2 P1 data valid/invalid state transitions Starting pacing transfers at end of training pattern Starting pacing transfers with no training patternEnding pacing transfers Paced information unit transferDeskewing Wide transferCommand phase Data phaseStatus phase Message phaseSignal restrictions between phases Message in phase exception condition handlingMessage OUT phase Message OUT phase exception condition handlingScsi bus phase sequences Scsi bus phase sequences overviewHard reset or protocol error Reselection Selection Arbitration DT Data Message OUT ST data bus protection using parity Parity checking rules for Selection and Reselection phasesData bus protection Data bus protection overviewError detection capabilities Order of bytes in the CRC fieldGeneral message protocols and formats Message formatsMessage format One-byte messagesTwo-byte messages Extended messagesMessage categories Extended Message CodesLink Control Messages Link Control message codes Key Disconnect IdentifyIdentify message format Bit ByteIgnore Wide Residue Ignore Wide Residue message formatIgnore field definition Invalid data bitsInitiator Detected Error Linked Command CompleteMessage Parity Error Message RejectModify Data Pointer message format Modify Bidirectional Data PointerModify Bidirectional Data Pointer message format No OperationParallel Protocol Request Parallel Protocol Request message formatValue 00h 01h-FEh FFh Description Timing values Use ST Data in and ST Data OUT phases to transfer data Valid protocol options bit combinationsUse QAS for arbitration Parallel Protocol Request messages implied agreement Restore Pointers QAS RequestSave Data Pointers Synchronous Data Transfer Request Synchronous Data Transfer Request message formatSdtr messages implied agreements Target initiated Sdtr negotiation Initiator initiated Sdtr negotiationTask Complete Wide Data Transfer Request Wide Data Transfer Request message formatWdtr message implied agreement Target initiated Wdtr negotiationResponding Scsi device Wdtr response Implied agreement Task attribute messages Task attribute message overview and codesTask attribute message codes ACA Auto Contingent AllegianceACA message format Head of Queue OrderedTask management messages Task management message codes Task management message codesAbort Task 0EhLogical Unit Reset Target ResetAbort Task SET Clear ACAMiscellaneous Scsi bus characteristics Bus reset condition Hard resetReset events Asynchronous condition recoveryActive pointers Saved pointersCommand processing considerations and exception conditions Asynchronous event notificationIncorrect initiator connection Unexpected Reselection phase SPI information units Information unit transfer logical operationsPage Parallel Scsi Interface Product Manual, Rev. a 115 116 Parallel Scsi Interface Product Manual, Rev. a Parallel Scsi Interface Product Manual, Rev. a 117 SPI command information unit SPI information unitsSPI command information unit Bit Byte Task Attribute Codes Description Task Management flags Codes DescriptionSPI LQ information unit SPI LQ information unit Bit ByteBidi Direction SPI LQ information unit type Codes Type DescriptionF0H FFh AllPage SPI data information unit SPI data stream information unitSPI data information unit Bit Byte SPI status data stream information unit Bit Byte SPI status information unit SPI status information unit Bit ByteReserved Reserved for FCP SPI command information unit fields invalid Packetized Failures field Bit BytePacketized Failures code Codes Description Task management function not supportedPage 130 Parallel Scsi Interface Product Manual, Rev. a Command implementation requirements Command Descriptor Block CDBReserved Page Fixed and variable length Command Descriptor Block formats Typical CDB for 12-byte commands Bit Byte Typical CDB for 16-byte commands Bit ByteAdditional CDB Data if required Typical variable length CDB Bit Byte Operation Code 7Fh Additional CDB Length n-7Page Control field Bit Byte Last Naca aLink b Status Status precedence Command examples Single command exampleDisconnect example Disconnect exampleTiming examples Auto Contingent Allegiance or Contingent AllegianceOverlapped commands Clearing an Auto Contingent Allegiance conditionIncorrect logical unit selection Sense dataAsynchronous Event Reporting Autosense Unit Attention condition Target hard reset Logical unit resetQueued tasks formerly queued I/O processes Untagged task queuingTagged task queuing Parameter rounding Programmable operating definitionIncorrect initiator connection Default self-test S.M.A.R.T. systemSelf-test operations Short and extended self-testsForeground mode Background modeSelf-test modes Exception commands for background self-tests Device type a Command Reference All device typesSelf-test mode summary Error detection for asynchronous information phasesProtection code Covered signals Word Location Signal MeaningPage Error detection properties Code descriptionProtection code usage Error handling Protection code transmissionEnabling protection code checking Disabling protection code checkingCase 1-Power off during removal or insertion SPI-3 to SCSI-2 terminology mapping SPI-3 to SCSI-2 terminology mappingSPI-3 equivalent term SCSI-2 term Index Code value reserved Disconnect privilege 148 domain 5, 9 dormant Initiator 3, 6, 14, 131, 140 faulted Multidrop 7 multimode Page Scsi Page Wdtr 40 170 Parallel Scsi Interface Product Manual, Rev. a Page Seagate Technology LLC