– 42 –Pin No. Pin Name I/O Description
47 to 52 A03, A04, A02,
A05, A01, A06 O Address signal output to the external D-RAM Not used (open)
53 VDIO1 —Power supply terminal (+2.4V) (for I/O cell)
54 VSIO1 —Ground terminal (for I/O cell)
55 to 59 A00, A07, A10,
A08, A09 O Address signal output to the external D-RAM Not used (open)
60 XRAS O Row address strobe signal output to the external D-RAM “L” active Not used (open)
61 IXOE O Output enable signal output terminal “L” active Not used (open)
62 IXWE O Data write enable signal output terminal “L” active Not used (open)
63 XCAS O Column address strobe signal output to the external D-RAM “L” active Not used (open)
64 to 67 D1, D2, D0, D3 I/O Two-way data bus with the external D-RAM Not used (open)
68 VDC3 —Power supply terminal (+1.7V) (for internal logic)
69 VSC3 —Ground terminal (for internal logic)
70 A11 O Address signal output to the external D-RAM Not used (open)
71 XOE O Output enable signal output to the external D-RAM “L” active Not used (open)
72 XWE O Data write enable signal output to the external D-RAM “L” active Not used (open)
73 MVCI I Digital in PLL oscillation input from the external VCO Not used (fixed at “L”)
74 ASYO O Playback EFM full-swing output terminal
75 ASYI I Playback EFM asymmetry comparator voltage input terminal
76 AVD1 —Power supply terminal (+2.4V) (analog system)
77 BIAS I Playback EFM asymmetry circuit constant current input terminal
78 RFI I Playback EFM RF signal input from the SN761056CDBT (IC501)
79 AVS1 —Ground terminal (analog system)
80 PCO O Phase comparison output for master clock of the recording/playback EFM master PLL
81 FILI I Filter input for master clock of the recording/playback EFM master PLL
82 FILO O Filter output for master clock of the recording/playback EFM master PLL
83 CLTV I Internal VCO control voltage input of the recording/playback EFM master PLL
84 PEAK I Light amount signal (RF/ABCD) peak hold input from the SN761056CDBT (IC501)
85 BOTM I Light amount signal (RF/ABCD) bottom hold input from the SN761056CDBT (IC501)
86 ABCD I Light amount signal input from the SN761056CDBT (IC501)
87 FE I Focus error signal input from the SN761056CDBT (IC501)
88 AUX1 I Auxiliary signal input terminal Not used (fixed at “H”)
89 VC I Middle point voltage (+1.2V) input terminal
90 ADIO O Monitor output of the A/D converter input signal Not used (open)
91 ADRT I A/D converter operational range upper limit voltage input terminal (fixed at “H” in this set)
92 AVD2 —Power supply terminal (+2.4V) (analog system)
93 AVS2 —Ground terminal (analog system)
94 ADRB I A/D converter operational range lower limit voltage input terminal (fixed at “L” in this set)
95 SE I Sled error signal input terminal Not used (fixed at “L”)
96 TE I Tracking error signal input from the SN761056CDBT (IC501)
97 DCHG I Connected to the +2.4V power supply
98 APC I Error signal input for the laser automatic power control Not used (fixed at “H”)
99 ADFG I ADIP duplex FM signal (22.05 kHz ± 1 kHz) input from the SN761056CDBT (IC501)
100 VDIO2 —Power supply terminal (+2.2V) (for I/O cell)
101 VSIO2 —Ground terminal (for I/O cell)
102 F0CNT O Center frequency control signal output terminal of internal circuit filter Not used (open)