Appendix A: BIOS POST Checkpoint Codes
Appendix A
BIOS POST Checkpoint Codes
When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h.
A-1 IA-32 Post Codes
The
Checkpoint | Code Description |
D0h | The NMI is disabled. Power on delay is starting. Next, the initialization |
| code checksum will be verified. |
D1h | Initializing the DMA controller, performing the keyboard controller |
| BAT test, starting memory refresh, and entering 4 GB flat mode next. |
D3h | Starting memory sizing next. |
D4h | Returning to real mode. Executing any OEM patches and setting the |
| Stack next. |
D5h | Passing control to the uncompressed code in shadow RAM at |
| E000:0000h. The initialization code is copied to segment 0 and control |
| will be transferred to segment 0. |
D6h | Control is in segment 0. Next, checking if <Ctrl> <Home> was pressed |
| and verifying the system BIOS checksum. If either <Ctrl> <Home> |
| was pressed or the system BIOS checksum is bad, next will go to |
| checkpoint code E0h. Otherwise, going to checkpoint code D7h. |
