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VLYNQ Port Registers
3.9Receive Address Map Size 1 Register (RAMS1)
The receive address map size 1 register (RAMS1) is used to identify the intended destination of inbound serial packets. The RAMS1 is shown in Figure 17 and described in Table 14.
Figure 17. Receive Address Map Size 1 Register (RAMS1)
31 | 2 | 1 | 0 |
RXADRSIZE1 |
| Reserved | |
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LEGEND: R/W = Read/Write; R = Read only; |
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Table 14. Receive Address Map Size 1 Register (RAMS1) Field Descriptions
Bit | Field | Value | Description |
RXADRSIZE1 | The RXADRSIZE1 field is used to determine if receive packets are destined for the first of | ||
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| four mapped address regions. RXADRSIZE1 is compared with the address contained in the |
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| receive packet. If the received packet address is less than the value in RXADRSIZE1, the |
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| packet address is added to the receive address map offset 1 register (RAMO1) to obtain the |
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| translated address. |
Reserved | 0 | Reserved. Always read as 0. Writes have no effect. |
3.10 Receive Address Map Offset 1 Register (RAMO1)
The receive address map offset 1 register (RAMO1) is used with the receive address map size 1 register (RAMS1) to translate receive packet addresses to local device configuration bus addresses. The RAMO1 is shown in Figure 18 and described in Table 15.
Figure 18. Receive Address Map Offset 1 Register (RAMO1)
31 | 2 | 1 | 0 |
RXADROFFSET1 |
| Reserved | |
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LEGEND: R/W = Read/Write; R = Read only; |
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Table 15. Receive Address Map Offset 1 Register (RAMO1) Field Descriptions
Bit | Field | Value | Description |
RXADROFFSET1 |
| The RXADROFFSET1 field is used with the receive address map size 1 register (RAMS1) | |
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| to determine the translated address for serial data. If the received packet address is less |
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| than the value in RAMS1, the packet address is added to the contents of this register to |
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| obtain the translated address. |
Reserved | 0 | Reserved. Always read as 0. Writes have no effect. |
SPRU938B | VLYNQ Port | 33 |
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