Texas Instruments manual 1. TAS3002 Terminal Functions Continued

				Table 1−1. TAS3002 Terminal Functions (Continued)
	TERMINAL		I/O				DESCRIPTION
NAME		NO.
CAP_PLL		10	I	Loop filter for internal phase-locked loop (PLL)
CLKSEL		11	I	Logic low selects 256 fS; logic high selects 512 fS MCLK
CS1		7	I	I2C address bit A0; low = 68h, high = 6Ah
DVDD		17	I	Digital power supply (3.3 V)
DVSS		18	I	Digital ground
GPI0		28	I	Switch input terminals
GPI1		29
GPI2		30
GPI3		31
GPI4		32
GPI5		33
		21	I	Digital audio I/O control (low = input; high = output)
IFM/S
		5	O	Low when analog input A is selected (will sink 4 mA)
INPA
LINA		1	I	Left channel analog input 1
LINB		48	I	Left channel analog input 2
LRCLK/O		19	I/O	Left/right clock input/output (output when				is high)
							IFM/S
MCLKO		12	O	MCLK output for slave devices
NC		34		No connection; Can be used as a printed circuit board routing channel
NC		36		No connection; Can be used as a printed circuit board routing channel
PWR_DN		8	I	Logic high places the TAS3002 device in power-down mode
		6	I	Logic low resets the TAS3002 device to the initial state
RESET
RINA		40	I	Right channel analog input 1
RINB		41	I	Right channel analog input 2
SCL		15	I/O	I2C clock connection
SCLK/O		20	I/O	Shift (bit) clock input (output when		is high)
					IFM/S
SDA		16	I/O	I2C data connection
SDIN1		22	I	Serial data input 1
SDIN2		23	I	Serial data input 2
SDOUT0		25	O	Serial data output from ADC
SDOUT1		26	O	Serial data output (from internal audio processing)
SDOUT2		24	O	Serial data output (a monaural mix of left and right, before processing)
TEST		9	I	Reserved manufacturing test terminal; connect to DVSS
VCOM		38	O	Digital-to-analog converter mid-rail supply (decouple with parallel combination of 10-∝F and 0.1-∝F
				capacitors)
VREFM		45	I	ADC minus voltage reference
VREFP		44	I	ADC plus voltage reference
VRFILT		2	O	Voltage reference low pass filter
XTALI/MCLK		13	I	Crystal or external MCLK input
XTALO		14	I	Crystal input (crystal is connected between terminals 13 and 14)

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