ADC Digital Filter | Texas Instruments TAS3002 instruction

8.4 ADC Digital Filter

TA = 25°C, AVDD = 3.3 V, DVDD = 3.3 V, fS = 48 kHz, 20-bit I2S mode

All terms characterized by frequency are scaled with the chosen sampling frequency, fS. See Figure 8−1 through Figure 8−4 for performance curves of the ADC digital filter.

	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT

ADC decimation filter (LPF)	Pass band		0.0		20.0	kHz

	Pass band ripple			±0.01		dB

	Stop band			24.1		kHz

	Stop band attenuation		80			dB

	Group delay			720		∝s

ADC high-pass filter (HPF)	Pass band (−3 dB)			0.87		Hz

	Deviation from linear phase	20 Hz to 20 kHz		1.23		degrees

	50
	0
− dB	−50
Amplitude	−50
	−100
	−150
	−150
	−200
	0	2 fs	4 fs	6 fs	8 fs	10 fs	12 fs
				f − Frequency − Hz

Figure 8−1. ADC Digital Filter Characteristics

Amplitude − dB

−20

−40

−60

−80

−100

0.2 fs

0.4 fs

0.6 fs

0.8 fs

1 fs

f − Frequency − Hz

Figure 8−2. ADC Digital Filter Stop-Band Characteristics

8−2

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Texas Instruments TAS3002 manual 1. ADC Digital Filter Characteristics

Contents

Digital Audio Processor With Codec Data ManualTAS3002 2001 IMPORTANT NOTICE 1 Introduction 1.2Features1.1 Description 1.3Functional Block Diagram Figure 1−1. TAS3002 Block Diagram Figure 1−2. TAS3002 Terminal Assignments 1.4 Terminal Assignments1.5 Terminal Functions Table 1−1. TAS3002 Terminal Functions Table 1−1. TAS3002 Terminal Functions Continued Page 2.1 Serial Interface Formats 2 Audio Data FormatsTable 2−1. Serial Interface Options … … … … … … … …2.2 Digital Output Modes … … … … … … … … 2.2.2I2S Serial-InterfaceFormatFigure 2−2. I 2S Serial-InterfaceFormat … … … … … … … … 2.2.3MSB-Left-Justified, Serial-InterfaceFormat… … … … … … … … UNIT 2.3 Switching CharacteristicsPARAMETER tcSCLK SCLK LRCLK tdSDOUT SDOUT1 SDOUT2 SDOUT0Page 3.2 Analog Output 3 Analog Input/Output3.1 Analog Input 3.2.1Direct Analog Output Figure 3−2. VCOM Decoupling Network 3.2.2Analog Output With GainFigure 3−3. Analog Output With External Amplifier TAS3002 3.2.3Reference Voltage FilterFigure 3−4. TAS3002 Reference Voltage Filter Page 4.2 Software Soft Mute 4.1 Soft Volume Update4 Audio Control/Enhancement Functions 4.3 Input Mixer Control 4.5 Treble Control 4.4 Mono Mixer ControlFigure 4−1. TAS3002 Mixer Function 4.7 De-EmphasisMode DM 4.6 Bass ControlFigure 4−2. De-EmphasisMode Frequency Response 4.8 Analog Control Register 40h Table 4−1. Analog Control Register Description 4.9.2Loudness Gain 4.9 Dynamic Loudness Contour4.9.1Loudness Biquads 4.9.3Loudness Contour Operation 4.10 Dynamic Range Compression/Expansion DRCE 4.11 AllPass Function Table 4−2. Main Control Register 1 Description 4.12 Main Control Register 1 01h4.13 Main Control Register 2 43h Table 4−3. Main Control Register 2 DescriptionPage 5.1 Biquad Block Figure 5−1. Biquad Cascade Configuration5 Filter Processor 5.1.1Filter CoefficientsPage 6.2 I2C Protocol 6 I2C Serial Control Interface6.1 Introduction Figure 6−1. Typical I 2C Data Transfer Sequence Table 6−1. I 2C Protocol Definitions 6.3 Operation6.3.1Write Cycle Example Table 6−2. I 2C Address Byte Table 6.3.2TAS3002 I2C Readback Example 6.3.3I2C Wait States 6.4.2Write Byte Protocol 6.4 SMBus Operation6.4.1Block Write Protocol Table 6−3. I 2C Wait States 6.4.3Wait States 6.4.4TAS3002 SMBus ReadbackPage 7.2.2Reset 7.2 Power-Up/Power-DownReset7.2.1Power-UpSequence 7 Microcontroller Operation 7.2.4Fast Load Mode 7.2.3Reset CircuitFigure 7−1. TAS3002 Reset Circuit TAS3002 7.3 Power-DownMode 7.2.5Codec Reset 7.4 Test Mode 7.3.1Power-DownTiming SequenceFigure 7−2. Power-DownTiming Sequence 7.5 Internal Interface 7.6.2GPI Architecture Table 7−1. GPI Terminal Programming Start Power Up Initialize Default EEPROM Figure 7−3. Internal Interface Flow ChartRestore Volume and MCR Slave Write GPI Power Down 7.7 External EEPROM Memory Maps Table 7−2. 512-ByteEEPROM Memory Map 2.0 Channels FUNCTION ADDRESSBYTE NUMBER TAS3002 FUNCTION TAS3002 ADDRESSNUMBER CATEGORY FUNCTION TAS3002 ADDRESSNUMBER CATEGORY Static Digital Specifications 8 Electrical Characteristics8.2 Recommended Operating Conditions Figure 8−1. ADC Digital Filter Characteristics 8.4 ADC Digital Filter Figure 8−4. ADC High-PassFilter Characteristics 8.5 Analog-to-DigitalConverter 8.6 Input Multiplexer 8.7 DAC Interpolation Filter 8.8 Digital-to-AnalogConverter 8.9 DAC Output Performance Data 8.10 I2C Serial Port Timing Characteristics Figure 8−7. I 2C Bus Timing TAS3002 9 System DiagramsFigure 9−1. Stereo Application Clock Figure 9−2. TAS3002 Device, 2.1 Channels TAS3001TAS3002 PFB S-PQFP-G48 10 Mechanical InformationPLASTIC QUAD FLATPACK 10−2